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A complete investigation of the effect of Li doping on the physical, material, electromechanical and piezoelectric properties of ZnO nanowires (NWs) is presented. Low temperature hydrothermal growth technique is used to grow vertically aligned crystalline ZnO NWs doped with different concentrations of Li. Characterization techniques reveal considerable physical, material and electromechanical property modifications of the ZnO NWs due to the incorporation of Li dopants. Atomic Force Microscope is utilized to apply controlled amount of force on the fabricated NWs to assess their piezoelectric response. More than twenty two-fold improvement is observed in sensitivity due to the combined effect of modifications in NW geometry and piezoelectric properties with the addition of Li. Finite element method simulations were performed to decouple the individual effect of Li doping on the NW size and on the piezoelectric coefficient and to see how much each effect plays a role in the sensitivity improvement. It is estimated that the changes in the material and electromechanical properties alone are responsible for more than seven-fold improvement in the sensitivity. The impact of ‘kick-out’ diffusion mechanism of Li in ZnO is one of the major factors responsible behind this sensitivity improvement. It is also observed that there is an optimum level of Li doping concentration which can lead to the best piezoelectric performance by the ZnO NWs. The novelty of this work lies on the detailed analyses to illustrate the physics and impact of Li dopants in ZnO NW structures from a piezoelectric point of view towards improving their application as a nano-sensing and nano-energy harvesting element.

Surface micro-machined z-axis capacitive accelerometers were designed and fabricated on a flexible polyimide substrate, conformal down to 2 cm radius of curvature with the stresses sustained by all layers well below the yield strength for each material. A novel UV-LIGA fabrication technique was developed to realize a thicker proof-mass (8 μm) compared to the spring (3 μm), thus decoupling the two important parameters: the stiffness and the proof-mass to achieve higher sensitivity. Devices with three different sizes were fabricated with the capability of sustaining under distinct amount of acceleration and tuned to frequencies ranging from 600 Hz to 1100 Hz. The largest device, having the area of 960 μm × 960 μm, showed a sensitivity of 187 fF/g with a SNR (Signal to Noise Ratio) of at least 100 when characterized at its resonance frequency of 800 Hz. The applied acceleration was ±4 g in addition to gravitation.

Uncooled infrared detectors (IR) on a polyimide substrate have been demonstrated where amorphous silicon (a-Si) was used as the thermometer material. New concepts in uncooled microbolometers were implemented during the design and fabrication, such as the integration of a germanium long-pass optical filter with the device-level vacuum package and a double layer absorber structure. Polyimide was used for this preliminary work towards vacuum-packaged flexible microbolometers. The detectors were fabricated utilizing a carrier wafer and low adhesion strength release layer to hold the flexible polyimide substrate during fabrication in order to increase the release yield. The IR detectors showed a maximum detectivity of 4.54 × 106 cm Hz1/2/W at a 4 Hz chopper frequency and a minimum noise equivalent power (NEP) of 7.72 × 10−10 W/Hz1/2 at a biasing power of 5.71 pW measured over the infrared wavelength range of 8–14 μm for a 35 μm × 35 μm detector. These values are comparable to other flexible microbolometers with device-level vacuum packaging which are found in literature.

The design, fabrication, performance simulation and characterization of a piezoelectric zinc oxide (ZnO) nanowire (NW) micro-energy harvester integrated with a microelectromechanical proof-mass/spring system are presented. Low temperature hydrothermal growth of vertically aligned nanowires together with MEMS surface micromachining and UV-LIGA (Lithographie, Galvanoformung, Abformung) processes were utilized to achieve efficient coupling of environmental vibrations to the nano energy harvester. The NWs were connected in series through the membrane/proof-mass structure to achieve higher output voltage. A novel polyimide fill-in and etch-back technique was employed to embed the NW tips into the membrane, such that the NWs were compressed and stretched by the membrane/proof-mass structure in response to the external vibrations. Peak power of 70 pW was observed across an optimal 7 MΩ load when the nano energy harvester was excited with an acceleration of 1.4 g at 40 Hz, corresponding to 22 mW/cm 3 volume-normalized power output. The measured voltage between the top and the bottom electrode was 21.4 mV for this case. The output frequency spectral density with 40 Hz excitation and output voltage with varying excitation frequency are also discussed.

A novel triboelectric energy harvesting (TEH) and sensing system scaled down to microelectromechanical systems (MEMS) size is presented. The design is structurally optimized for harvesting the highest average power and power density while ensuring the structural robustness. Unlike traditional triboelectric energy harvesters, this design results in a high operating frequency with a wide bandwidth. Adoption of MEMS fabrication techniques including the use of spin-coated Teflon AF rather than a Teflon sheet, adaptation of UV-LIGA (Ultra-Violet Lithographie, Galvanoformung, Abformung) with modifications and implementation of a thick polyimide sacrificial layer make the fabrication process unique. If excited by ±9.33 g external vibration with a frequency of 1.15 kHz, the TEH can generate 0.179 μW average power and 0.597 μW peak power at an optimum resistive load of 256 kΩ. The peak surface power density, volumetric power density and acceleration-normalized volumetric power density reach 3.98 μWcm−2, 2.64 mWcm-3 and 30.3 μWcm-3/g2, respectively. While the surface power density of the presented TEH is moderate, the volumetric power density and acceleration-normalized volumetric power density are quite competitive among the state-of-the-art designs. The TEH also demonstrates a wide operating frequency bandwidth of 920 Hz. If operated as an accelerometer, the device shows a linear sensitivity of 43 mV/g. Although the simulation predicts the optimum operating frequency and load resistance of the system to be at 800 Hz and 10 MΩ, respectively, the experimental results demonstrate these values to be at 1150 Hz and 256 KΩ. A few fabrication anomalies, most notably the notching in the Teflon layer and bowing of the proof-mass, are responsible for this deviation. In addition, a distortion is observed in the simulated output voltage profile which is not present in the experimental output voltage profile due to the presence of the parasitic capacitance in the experimental circuit. The aforementioned triboelectric energy harvester can have specific applications in the sensor and actuator systems in the aircraft industry as well as in the automobile industry, micro-robotic systems, prosthetic systems, and sensor nodes in the internet of things (IoT) due to its operating frequency and bandwidth range.

The effect of channel hot carrier stress has been investigated in pMOSFETs with respect to channel hole trapping by the gate oxide traps and the resultant Random Telegraph Signals (RTS) observed at the output. Process- and stress- induced oxide traps have been identified through RTS measurements. These traps are believed to be E′ centers, acting as hole-attractive or repulsive centers, causing RTS through correlated carrier number and mobility fluctuations. Generation of E′ centers as well as activation of the passivated oxide defects as a result of stress are thought to be the reasons behind observing the stress-induced RTS. Two of the observed defects: one process-induced and one stress-induced trap have disappeared and reappeared randomly with stress. We report the reaction of the defects with hydrogen to be responsible for the volatile nature of the traps. Hydrogen is either bound to the Si/SiO2 interface or trapped at the oxide defects. Applying the stress releases these hydrogen species, which then drift towards the gate through the oxide layer and react with the oxide defects to passivate them. Reaction with another hydrogen de-passivates the defect releasing H2. This is the first article that reports hydrogen to deactivate and reactivate oxide traps responsible for RTS.

The physical origin of majority charge carrier fluctuations in the SiO2 interface of Si at accumulation has been investigated and analyzed for differently processed and voltage-rated reduced surface field (RESURF), lateral-double-diffused MOS (LDMOS) transistors. Surface carrier mobility fluctuation due to remote Coulomb scattering by the trapped charge in the gate oxide is identified as the dominant physical mechanism for LDMOS 1/f noise irrespective of process technologies. A significant contribution to the measured noise has been noted from the surface majority carrier mobility fluctuation due to trapped charge at the accumulation region of the extended drain region, dominant over other sources including the surface minority charge carrier fluctuations in the channel. Active oxide trap density was characterized spatially and for the first time up to ∼0.4 eV above the conduction band-edge of Si. The interface trap density in the unstressed devices (∼8 × 106 cm−2) increased more than an order of magnitude (∼1 × 108 cm−2) after the devices were stressed for 10,000 sec at their individual worst drain current and on-resistance degradation conditions. The extracted Si/SiO2 interface trap density above the silicon conduction band edge was found to be several orders of magnitude lower than that reported for silicon mid-gap energies, even after stressing. Since the traps near the quasi-Fermi level for electrons are active in trapping–detrapping, and the Fermi level is energetically positioned above the conduction band edge of Si in the investigated devices as compared to the previously reported observations, the lower trap density obtained here is an indication for reversal of the well-known exponential trap energy distribution beyond the conduction band-edge of Si. These findings shift the focus from the channel to the gate overlap section of the extended drain and the quality of the Si/SiO2 interface in that region.

A nanoelectromechanical vibrational energy harvester is reported based on a ZnO nanorod array coupled to a microelectromechanical mass-spring system. A carpet of vertically aligned crystalline zinc oxide nanorods grown using a low temperature process was characterized to determine their piezoelectric response to mechanical excitation. An atomic force microscope was operated in the force spectroscopy mode to probe ZnO nanorods applying a force in the µN range. In contrast to previously published reports using lateral tip motion (C-AFM), the motion of the AFM tip in our experiment was perpendicular to the plane of the nanorods, which closely mimics the operation of the bulk-micromachined NEMS energy harvester. Voltage pulses with amplitudes ranging from hundreds of µV to few mV were observed. The novelty of this work lies in the integration of the ZnO NEMS and Si-MEMS structures, the use of nanoimprint lithography to achieve periodic, vertical placement of the ZnO nanorods, and the demonstration of piezoelectric voltage generation through low-temperature processed ZnO nanorod carpet.

A low-temperature deposition process employing aluminum-induced crystallization has been developed for fabrication of piezoresistive polycrystalline silicon (polysilicon) films on low cost and flexible polyimide substrates for force and pressure sensing applications. To test the piezoresistive properties of the polysilicon films, prototype pressure sensors were fabricated on surface-micromachined silicon nitride (Si 3 N 4 ) diaphragms, in a half-Wheatstone bridge configuration. Characterization of the pressure sensor was performed using atomic force microscope in contact mode with a specially modified probe-tip. Low pressure values ranging from 5 kPa to 45 kPa were achieved by this method. The resistance change was found to be − 0.1% to 0.5% and 0.07% to 0.3% for polysilicon films obtained at 500 °C and 400 °C, respectively, for the applied pressure range.

A new unified noise model is presented that accurately predicts the low-frequency noise spectrum exhibited by MOSFETs with high dielectric constant (high- k ), multi-stack gate dielectrics. The proposed multi-stack unified noise (MSUN) model is based on number and correlated mobility fluctuations theory developed for native oxide MOSFETs, and offers scalability with respect to the high- k /interfacial layer thicknesses. In addition, it incorporates the various electronic properties of high- k /interfacial layer materials such as energy barrier heights between different gate layers, and dielectric trap density with respect to band energy and position in the dielectric. For verification of the new model, the low-frequency noise, DC and conventional split C–V measurements were performed in the 78–350 K temperature range on TaSiN/HfO 2 n-channel MOSFETs. The interfacial layer in these devices was either thermal SiO 2 by Stress Relieved Pre-Oxide (SRPO) pretreatment or chemical SiO 2 resulting from standard RCA (Radio Corporation of America) clean process. Using the experimental noise data, the channel carrier number fluctuations mechanism was at first established to be the underlying mechanism responsible for the noise observed at all temperatures considered. Secondly, the normalized noise exhibited a weak dependence on temperature implying that the soft optical phonons, although known to result in mobility degradation, have no effect on the noise characteristics in these high- k gate stack MOSFETs. Finally, the new model was shown to be in excellent agreement with the measured noise in 1–100 Hz frequency range at temperatures of 78–350 K for both gate stacks.

A physics-based low frequency noise model has been developed for MOSFET devices with nitrided high- κ gate dielectric materials. The new model is built upon the correlated carrier number and surface mobility fluctuations theory, where the original Unified Model was modified to take into account the multilayered structure of the high- κ gate dielectrics, and the resultant charge carrier tunneling process in terms of a two-step cascaded barrier instead of a single step barrier. The new model eliminates the discrepancies previously reported for the dielectric trap density values extracted from noise data using the original Unified Model for flicker noise. The dielectric trap density, typically taken as an average or spatially uniform in the dielectric and constant with respect to energy, is replaced here with an exponential expression dependent on the band-gap energy along with a spatial distribution of the traps in the high- κ layer. Thus, due to the energy dependence of the trap density, bending of the energy bands induces an additional non-uniformity in the spatial trap distribution. Implementation of this expression also provides the much needed flexibility in simulating realistic trap profiles in high- κ materials. Here, MOSFETs with nitrided dielectrics were considered for the noise experiments, as nitridation presents many advantages for the electrical and thermal characteristics of the gate insulator. Variable temperature low frequency noise and mobility measurements have been performed on MOSFETs with nitrided high- κ dielectric. Phonon scattering was found to have a profound effect on the mobility behavior, but no consequence on the low frequency noise characteristics. The low frequency noise data obtained on devices with different interfacial layer thicknesses and different regions of transistor operation was successfully compared with the predictions of the newly developed Multi Stack Unified Noise (MSUN) Model over a temperature range of 172–300 K.

Low frequency noise measurements were performed on n- and p-channel MOSFETs with TaSiN and TiN metal gates, respectively, deposited on ALD HfO2 gate dielectric. Lower normalized current noise power spectral density is reported for these devices in comparison to poly-Si/HfO2 devices and that yielded one order lower magnitude for extracted average effective dielectric trap density. In addition, the noise levels in PMOS devices were found to be higher than NMOSFETs and the dielectric trap distribution less dense in the upper mid-gap than the lower mid-gap region. The screened carrier scattering coefficient extracted from the noise measurements was approximately the same for metal and poly-Si high-k stacks but higher than that for the poly-Si SiO2 system, implying higher Coulomb scattering effects. It is believed that the elimination of dopant penetration seen in poly-Si system and low thermal budgets for metal gate deposition helped lower the noise magnitude and yielded better mobility and effective trap density values.

This paper presents design, fabrication and measured performance parameters of micromachined infrared detectors on polyimide substrates. The detectors are of bolometer type made of semiconducting yttrium–barium–copper oxide (YBCO) as the thermometer material and are built on a 40–50m-thick layer of polyimide (PI5878G) that serves as a flexible substrate. A thin film of Si3N4 supports the detectors. Surface micromachining is used to isolate the detectors and the supporting nitride layer from the substrate. Despite being supported by a layer of Si3N4, an average thermal conductivity of 5.61 × 10 −7 W/K, comparable to self-supporting devices on flexible substrates has been measured. This opens the possibility of placing such flexible sensors on micromachined membranes, integrated with other functions such as pressure sensing to build “Smart Skin.” Roomtemperature responsivity of 7.4 × 10 3 V/W and detectivity of 6.6 × 10 5 cm Hz 1/2 /W were demonstrated on 40m × 40m microbolometers. The effect of substrate heating was also investigated and was found not to cause cross talk between the pixels. If these sensors are to be used as part of multi-functional, flexible sensor systems, device-level vacuum packaging is necessary. This was investigated using computer simulations for structural analysis and found to be feasible. © 2006 Elsevier B.V. All rights reserved.

In this paper, the effects of different transistor design aspects on the noise behavior of SiGe heterojunction bipolar transistors have been investigated. Selectively implanted collector, although retards the base push-out, does not deteriorate the noise characteristics. Moreover, a higher dopant implant in the extrinsic base region intended for a smaller base resistance does not deteriorate the noise characteristics. While the interface between the SiGe epitaxial and polycrystalline layers does not have any detrimental impact, the emitter-poly overlap significantly influences both the DC and the noise characteristics. Smaller emitter-poly overlap results in an increased non-ideal base current at lower bias voltages and produces appreciable generation–recombination noise. For all the transistors, except for the ones with smaller emitter-poly overlap, the base current noise power spectral density shows a near quadratic dependence on the base current, where the noise is believed to originate mostly from the superposition of the generation–recombination noise in the intrinsic emitter–base junction. The base current noise power spectral density for the transistors with a smaller emitter-poly overlap shows a near linear dependence on the base current, which results from an increased contribution from the trap-assisted tunneling fluctuations of the minority carriers at the surface of the emitter–base junction.

Micromachined infrared sensor arrays have been fabricated on flexible polyimide substrates using a silicon wafer carrier during the fabrication process. These flexible polyimide substrates containing the micromachined infrared sensors were removed from the silicon wafer at the end of fabrication. The fabrication technique utilized surface micromachining of a bridge structure to form the thermal infrared (IR) sensors on flexible substrates. Semiconducting yttrium barium copper oxide YBCO was used as the radiation sensitive material. 1 × 10 sensor arrays of microbolometers were micromachined using a photo-definable polyimide sacrificial layer and characterized before and after removal of the substrate from the Si wafer carrier. The flexible infrared microsensors showed similar performance to microbolometers fabricated on rigid silicon substrates. The YBCO thermistors exhibited a temperature coefficient of resistance (TCR) of ∼−3.4% K−1 near room temperature. Responsivity and detectivity values as high as 6.1 × 104 V/W and 1.2 × 108 cm Hz1/2/W, respectively, were measured in vacuum for a 40 μm × 40 μm microbolometer with 1 μA bias. The lowest observed noise equivalent power was 4.1 × 10−11 W/Hz1/2 while the lowest thermal time constant was 5.7 ms.

1/f noise was measured on lateral bipolar PNP transistors over a temperature range of 220

Random telegraph signals (RTS) are two or more level switching events observed at the drain current or voltage of a MOSFET, which originate from the traps at the Si/SiO2 interface through the process of capture and emission of charge carriers. Even though there are several available models for low-frequency noise in MOSFETs today, none of them provide modeling tools for RTS. A model has been developed for RTS at the drain of sub-micron scale MOSFETs. The RTS power spectral density is given in terms of three parameters, which fully characterize the RTS, namely capture time, emission time and RTS amplitude. These three parameters are expressed in the terms of the device physical parameters, biasing conditions and temperature, through seven independent modeling parameters: the trap position, xT and yT, trap energy, ET−ECox, capture cross-section, σ0, trap binding energy, ΔEB, and empirical fitting constants for the screened scattering coefficient, K1 and K2. The model was tested through RTS data obtained on sub-micron LDD n-MOSFETs. Results were compared with the model and fitting parameters were extracted. The trap position xT was found to be 13 A, close to the Si–SiO2 interface compared to the oxide thickness of 50 A. yT is 0.12 μm, indicating the trap is located close to the drain side. The σ0 obtained from the fittings was 7 × 10−20 cm2 at VGS=1.2 V and increased with gate voltage. ΔEB was 0.3 eV. The K1 and K2 values were evaluated to be 3 × 10−13 and −2.5 × 10−16 V s, respectively. The extracted parameters are comparable to the reported values measured on similar devices.

Random telegraph signals (RTS) have been investigated in the drain to source voltage of Weff×Leff=1.37×0.17 μm2 medium-doped drain (MDD) n-type MOSFETs. The emission (τe) and capture (τc) times of the probed trap were studied as a function of gate voltage as well as substrate voltage. The small size and high doping density of the n-MOSFETs studied create a strong electric field in the MOSFET inversion layer, which makes the surface conduction band split into discrete energy levels. Therefore, modified expressions of τe and τc including the influence of bulk bias (VSB), which changes the degree of quantization, are presented. The trap position in the oxide with respect to the Si–SiO2 interface, and the trap energy, were calculated from the gate voltage dependence of the emission and capture times under different bulk bias conditions. The behavior of the emission and capture times predicted by the two-dimensional (2D) surface quantization effects is in qualitative agreement with the experimental results. The RTS amplitude (ΔVDS/VDS) shows a positive dependence on VSB. The coefficient α for screened oxide charge scattering was calculated at different gate voltages and bulk bias from the RTS amplitude. In addition, the theoretical calculation of the scattering coefficient α, using a 2D surface mobility fluctuation model, was presented, which shows a good agreement with the experimental data.

Random telegraph signals (RTS) have been used to characterize oxide traps of W×L=0.97×0.15 μm 2 medium-doped drain n-MOSFETs. RTS have been measured in the linear and saturation regions of operation, both in forward and reverse modes where the drain and source are reversed. The contribution of mobility fluctuations as well as number fluctuations to the amplitude of RTS has been investigated. The scattering coefficient due to screened Coulomb scattering effect is computed from the measured data as a function of channel carrier density. The depth of the position of the trap in the oxide from Si–SiO2 interface is calculated utilizing the dependence of the emission and capture times on the gate voltage. In addition, the position of the trap along the channel with respect to the source is obtained using the difference in the drain voltage dependence of the capture and emission times between the forward and reverse modes. Knowing the location of the trap in the oxide and along the channel, the energy associated with the trap can be extracted accurately from the data. This technique allows one to evaluate the trap energy at the point where the trap is located without any assumptions about the location of the trap or the need for variable temperature measurements. The probed trap was found to be an acceptor type center (repulsive for an n-MOSFET) located at about 27 A deep the oxide, half-way between drain and source with an energy of ECox−ET=3.04 eV, slightly above the conduction band edge.

Medium doped drain n-MOSFET with W eff × L eff = 0.29 × 0.20 μm 2 have been used to investigate complex random telegraph signals (RTS) in the drain to source voltage. Four-level switching events were observed, from which three discrete traps were distinguished. Their behavior was observed in the range of gate-to-source and drain-to-source voltages of 0.5–1.8 V, all in strong inversion. The capture and emission times of each trap were investigated as a function of gate bias as well as drain voltage. Using the mark-space ratio of the switching events, the position of the traps from the Si–SiO 2 interface was calculated to be about 0.43, 0.55 and 0.74 nm. These evaluations were used successfully to determine the trap energy level with respect to oxide conduction band edge. Comparative evaluation of the mobility fluctuations with respect to number fluctuations was done using RTS amplitude. The screened scattering coefficient due to the Coulomb scattering effect was examined with respect to the variation of carrier density in the channel as well as in the drain voltage for all three traps. An influence of one trap on another was observed and found that there is a change of the energy level of 0.06 eV due to this effect.

Low-frequency (LF) noise (1 Hz–100 KHz) measurements have been performed on 12 n-channel MOSFETs with 5 μm width and 0.23–10 μm varying lengths. The MOSFETs were fabricated using a 0.18 μm, medium-doped-drain (MDD) technology. Interface state density and oxide trap density were extracted from the sub-threshold slope characteristics of I–VGS measurements, and from 1/f noise measurements, respectively. The McWhorter theory based on long-channel MOSFETs was found to break down for MOSFETs with L S V d ∝L −1 for L≥1 μm as expected from the McWhorter theory, but showed a stronger dependence on channel length for smaller devices. Following the Tsai and Ma formulation, a modified McWhorter model has been used, based on threshold voltage variations across the channel. The new model more accurately predicts the Si–SiO2 interface trap density and the channel length dependence of 1/f noise magnitude in sub-micron MDD MOSFETs. Three HSPICE 1/f noise models were evaluated. Although the highest level model provided a good fit to the data for L≥1 μm, for shorter channel devices all three levels underestimate the noise magnitude.

We have explored the charge transport mechanisms in six different YBaCuO semiconducting thin films in the temperature range of 70 K to room temperature. Two of the samples were deposited on LaAlO 3 substrate and were tetragonal with the composition of YBa 2 Cu 3 O 6.5 and YBa 2 Cu 3 O 6.3 . The other four were amorphous as-deposited on Si substrate with and without a MgO buffer layer, and on an oxidized Si substrate with and without a MgO buffer layer. All tested films exhibited semiconductor-type resistance vs. temperature characteristics with increasing resistance as the temperature was decreased. Around room temperature all six samples had thermally activated transport characteristics that was interpreted as activation of hole-like carriers from localized states around the Fermi level to extended states. As the temperature was decreased, two tetragonal samples went through a transition to a variable range hopping-like conduction. The amorphous ones remained within the thermally-activated transport regime in the temperature range of 253 K to 318 K, with E A ≈ 0.2 eV.

Low-frequency measurements were performed on W-plug via structures connecting two TiN/Al-0.5%Cu/TiN levels in order to evaluate the potential application of noise measurements as a characterization tool for electromigration reliability. Noise measurements were performed with ambient temperature ranging from 87°C to 180°C and applied current from 5.9 to 23.8 mA through 1.0 μm and 0.8 μm vias, corresponding to sample temperatures up to 195.2°C. The noise spectral density was found to be in the form of 1ƒ. The noise magnitude was consistently higher for both vias when the electron flow was from upper level to lower level compared to the opposite direction. The noise activation energy Ea obtained from the temperature dependence of voltage noise power spectral density at 10 Hz showed different behavior for the 1.0 μm via compared to the 0.8 μm via. For the smaller via, Ea = 0.36–0.37 eV regardless of the electron flow direction, whereas for the larger via, Ea = 0.47 eV for electron flow from upper level to lower level and Ea = 0.37 eV for electron flow from lower level to upper level.

Al-Cu-Si TiW multilayered via electromigration behavior was researched using the low frequency noise method. Noise measurements were performed with ambient temperature ranging from 100 to 200°C and applied current density from 5.3 × 10 5 to 3.3 × 10 6 A cm −2 , corresponding to sample temperatures up to 276°C. The noise spectral density was found to be in the form of 1 f γ with 0.95≤ γ ≤1.15, which corresponds to 1 f noise. The noise magnitude was independent of the electron flow direction at relatively low current densities and temperatures. However, for J ≥ 2.6 × 10 6 A cm −2 and T ambient ≥ 180°C ( T sample ≥228°C), the noise for electron flow out of the via was higher than that for electron flow into the via. At low current densities, the noise spectrum showed a quadratic dependence on current for both electron flow directions. However, at high current densities, the current exponent depended on the direction of electron flow. The average activation energy, E a , was found to be 0.11 eV when noise measurements were done on the same via sample for both current directions. When different samples were used for different current directions, a 0.23 eV activation energy value was observed. We interpret the first case as a very low-frequency pseudo-a.c. measurement, and the second case as a true d.c. measurement. In both cases, the activation energy did not depend on the direction of the electron flow. These activation energy values are small compared to the results obtained by the median time-to-failure method. The results are interpreted in terms of the electron mobility fluctuations due to fluctuations in the number of migrating vacancies.

1 f noise and dark current measurements on p-type Hg0.71Cd0.29Te Metal-Insulator-Semiconductor charge-integrating devices are presented. The contribution of different dark current components to total dark current and noise is analyzed. The unknown parameters are chosen as independent parameters within a reasonable range to fit to the experimental results. The dark current is calculated as a function of both temperature and device gate voltage. The results show that for the tested devices, the depletion dark current is dominant at the temperature range of 70–90 K, and the dark current caused by tunneling through Shockley-Read-Hall (SRH) centers is dominant at temperatures below 65 K. The discussion provides information in analyzing the origin of 1 f noise in Hg0.71Cd0.29Te MIS infrared detectors. This investigation is the first ever in-depth study of 1 f noise in HgCdTe MIS detectors as it relates to dark current components.

We have investigated mixing and parametric amplification with high- T c superconductor microbridges both experimentally and theoretically. The microbridges were operated as down converters, converting a 20 GHz radio frequency (RF) signal to a 1.5 GHz intermediate frequency (IF) signal under the action of an 18.5 GHz local oscillator (LO). In this paper, we show that the resistively shunted junction (RSJ) model agrees with the experimentally observed behavior. The RSJ model accurately describes the performance of the microbridges, predicting weak conversion in the parametric regime and high conversion gain in the mixing regime.

A model for 1 f noise is developed that is based on fluctuations of the number of energy states associated with extended defects and the defect gradient. The tendency for the source of the states such as dislocations to equilibrate by diffusion leads to a 1 f spectral distribution of the effective number of states. When the states are near the Fermi level and active in processes such as carrier recombination or tunneling in semiconductor devices, the fluctuations appear as 1 f noise in voltage or current. The model is quantitative and predicts low noise for a very uniform density of defects or very small defect size. The Hooge dimensionless constant is identified in terms of the defect structure.

Low frequency noise measurements were performed on five different wafers of multilevel W/Al-Cu metallization layers fabricated following the same process. The purpose of the study was to establish a correlation between the mean-time-to-failure (MTF) and low-frequency noise—magnitude and spectral shape—observed in these thin films. The spectral shape was found to be in the form 1 f γ where 0.8 1 f Noise parameters such as the current exponent and the noise magnitude coefficient extracted from the data using the recently proposed model agree closely with those obtained from independent noise measurements on similar samples from the same wafers.

At stressing-current densities, low-frequency noise in thin-metal films has been known to have a 1/ƒγ component where γ is between 0.8 and 2. Although several experimental investigations have been made to measure electromigration parameters such as activation energy and lifetimes of metallization layers by low-frequency measurements, investigators so far have had to rely upon semi-empirical expressions for theory. In this paper we develop a theory connecting ion migration in metals to low-frequency noise. The model is based on the electron mobility fluctuations due to scattering from vacancies migrating along the grain boundaries. Through this model the shape of the experimentally observed low-frequency spectra, the current dependence of the noise magnitude and the frequency exponent γ, as well as the temperature dependence of γ can be accurately explained. Moreover, the model also yields the observed thermally activated form and the activation energies for the low-frequency noise magnitude.

Low-frequency (LF) noise measurements were performed on aluminum thin films biased at current densities of 5 × 10 5 to 3 × 10 6 A/cm 2 at different temperatures up to 200°C. Correlation between the mechanisms causing these LF fluctuations and electromigration was investigated. Contrary to the 1/ f 2 form observed by other researchers, we observed 1/ f γ noise spectra where γ varied between 0.8 and 1.5. Through the Arrhenius plot of noise power spectral density, activation energies ranging from 0.60 to 0.69 eV have been obtained which agree with activation energies obtained through 1/ f 2 noise measurements. These values also agree with activation energies measured by conventional stressing techniques and are in the same range as electromigration mechanisms originating from grain boundaries. Through the current dependence of γ, and the current dependence of the noise power magnitude, we attempted to predict electromigration damage and time-to-failure. For the first time, we incorporated the current dependence of the spectral form in the analysis of noise magnitude for electromigration.

We performed 1ƒ noise measurements on n-channel Hg1−xCdxTe Metal-Insulator-Semiconductor Field-Effect Transistors (MISFETs) biased in linear and saturation regions of operation at 77 K. The cadmium mole fraction x was approximately 0.29 which corresponds to an energy band-gap of 0.24 eV at 77 K. Through the investigation of the dependence of drain voltage noise power spectral density on gate and drain bias, we estimated the insulator-semiconductor interface trap density as a function of energy. In this analysis, both the noise magnitude and the spectral shape was studied. The frequency span was from 150 Hz to 5 kHz. The noise behavior of the device was modeled using the modified McWhorter Model, originally developed for silicon FETs. The interface trap concentration values computed from the low-frequency noise measurements using the above model were found to agree closely with HgCdTeZnS interface properties measured by capacitance and conductance methods.

One of the proposed models for 1ƒ noise, thermal fluctuations theory, involves a diffusive mechanism which implies spatial correlation of the fluctuating quantity within a frequency-dependent correlation length. In order to test this prediction, we have performed spatial correlation measurements on p-type conductive diffused strips of silicon at temperatures between 20 and 295 K. The frequency span was from 10 Hz to 10 kHz. We have not found any correlation between the 1ƒ fluctuations in two different segments of the strip separated by 2.5 mils, making diffusion mechanism an unlikely origin of the noise.

The modified McWhorter model that has been developed before to explain the 1 ƒ γ noise in Metal-Oxide-Semiconductor-Field-Effect-Transistors was extended to include frequency dependence of the noise power spectrum on operating voltages. Under the assumption of energy and spatial distribution of traps in the oxide, the drain voltage noise spectrum was calculated for MOSFETs operating in the linear region. Experimentally flicker noise measured on n -channel enchancement-mode MOSFETs up to the frequency of 4 kHz. The actual value of the exponent γ in the 1 ƒ γ spectrum was found to increase with gate bias. Furthermore, it was found that the magnitude of the noise power decreased with gate bias. The detail of the calculations and the experimental results are presented.