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Pre-irradiation device characteristics, gamma radiation response, and possible use in radiation dosimetry have been investigated for MOSFETs with a 100 nm thick Er2O3 gate dielectric. The performance of these novel devices has been compared with that of commercial pMOS dosimeters (RadFETs) with a standard SiO2 gate oxide of the same thickness. The radiation sensitivity of the Er2O3 is significantly higher than that of SiO2, and this is particularly pronounced at lower dose levels. Significantly larger numbers of positive charges are trapped in the Er2O3 dielectric than in SiO2 during irradiation exposure, resulting in increased threshold voltage shift. After two weeks of room temperature annealing, 11.9% and 24.0% fading have been observed in SiO2 and Er2O3 samples, respectively. Higher fading for Er2O3 may be related to higher number of shallow traps close to the dielectric/silicon interface. These initial results are promising for the possible use of Er2O3 as a new gate dielectric in pMOS dosimeters. The observed enhancement of device sensitivity can be a milestone for the introduction of the pMOS dosimeters in personal dosimetry applications.

The thermal stability of two commercially available silicon carbide Schottky diode types has been evaluated following a 1000 h non-biased storage test under vacuum at 350 °C. The Ti-based Schottky (Anode) contact shows excellent stability over the duration of the test with less than 5% change in either extracted Schottky barrier height or ideality values. The Al die attach metalisation on the anode also shows no evidence of degradation after the test. However, a considerable change in series resistance was observed for both diode types, with up to a factor of 100 measured for one of the diodes. The primary early failure mode is related to degradation of the NiAg Ohmic (cathode) die attach metalisation. Demixing of the NiAg alloy, leading to Ag agglomeration is proposed to be the underlying degradation mechanism involved resulting in delamination of the die attach metalisation and the corresponding series resistance increase.

An analysis of extraction methodologies for the coupling ratios in non-volatile memories using numerical simulation is presented. The floating gate voltage of a non-volatile memory (NVM) cell cannot be accessed directly from measurements but can be derived using numerical simulation techniques. In this paper, various coupling ratio methodologies from literature are investigated using numerical simulation techniques and guidelines on improving the application of these methods to NVM cells are outlined. Measurements are performed which validate the increased accuracy of the methods and some of the improved methodologies are recommended for coupling ratio extraction in the Fowler–Nordheim regime. This work demonstrates the role of numerical simulation in supplementing the electrical characterisation of NVM cells.

The advent of the ULSI era, and the continuing decrease of the critical dimensions of MOSFETs, has raised a number of issues concerning the prediction of device reliability, and the consequences for overall product reliability. The established practice has been to assure reliability at the end of the lengthy product cycle. However, to achieve a shorter time-to-market, product reliability concerns should be addressed at the design stage (“design for reliability”). Accordingly, the design and implementation of reliability simulation tools, which give a prediction of the susceptibility of an IC design to device failure mechanisms, is becoming critical. This paper reviews some of the reliability simulation tools that are currently available to industry. The capability of the most popular of these tools is described for a number of different reliability hazards. A topical reliability simulation issue is addressed, and a statistical validation, comparing measured and simulated degraded ring oscillator data, is presented.

This paper provides a review of the use of simulation tools in the design process. It provides examples of applications where such tools can be effective in improving device functionality, yield, manufacturability and reliability. Topics covered are numerical process and device simulation, electromigration and stress migration simulation as well as circuit simulation and reliability modelling. Specific example of how such simulators work are provided and examples of currently available software tools are reviewed.

This work demonstrates that for constant oxide reliability stresses in the Fowler-Nordheim regime a low initial rate of charge trapping/detrapping results in long times to breakdown. It was found for MOS gate oxides that when the initial trapping has been completed at low fields times to breakdown enhance. Depending on the stress sequence measurement results can vary significantly which is of great relevance for correct oxide lifetime predictions.

This work describes the influence of low current pulses during high current stress on the trapping properties of thin silicon dioxide layers. The determination of the trapped oxide charge during Fowler-Nordheim stress from low current steps is discussed. It is shown that low bias steps are not a reliable indicator of the amount of trapped charge in the oxide due to trapping of additional charges during this measurement period.