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The negative charge formation, the charge-trapping mechanisms and the interface defect passivation of aluminum oxide/silicon nitride (AlO x /SiN x ) stacks deposited by plasma-enhanced chemical vapor deposition on p- type crystalline silicon (c-Si) are investigated. Constant voltage stress (CVS) investigations combined with capacitance – voltage ( C–V ) hysteresis analysis indicate the influence of different thermal treatments on the negative charge formation and allow discerning between fixed and trapped charges in the AlO x /SiN x system. The thermal budget during SiN x deposition activates negatively charged traps. An annealing step leads to the formation of a stable, fixed negative charge and reduces the defect state density ( D it ) at the c-Si/AlO x interface. A wet-chemical silicon oxidation (SiO x ) of the c-Si surface reduces D it even further, but introduces additional traps at the wet-chemical SiO x /AlO x interface. These traps lead to instabilities of the negative charge density and have a detrimental effect on the passivation quality. However, a firing step leads to the formation of a higher negative charge density due to charged traps. Combined with the enhanced chemical passivation, this results in a higher passivation quality than upon annealing. The trap-related negative charge upon firing is unstable due to electron detrapping. However, a positive CVS can recharge traps in the wet-chemical SiO x /AlO x /SiN x system negatively through electron injection from the c-Si.

The charge dynamics and the interface defect state density of AlOx/SiNx passivation stacks deposited by plasma-enhanced chemical vapor deposition (PECVD) on crystalline silicon (c-Si) wafers are investigated. High frequency (1 MHz) capacitance voltage (C-V) measurements were performed on stacks in the as deposited state and after an annealing step. C-V sweeps reveal an initially high negative charge density for the as deposited sample, activated by the thermal budget during SiNx deposition. However, this charge state is unstable and reduced owning to electron detrapping and emission into the c-Si upon applying moderate voltages. In the annealed sample, the AlOx/SiNx stack has a stable negative fixed charge. Both for as deposited and for annealed samples, applying a positive or negative constant gate voltage stress (Vstress) enhances or reduces the negative effective charge density (Qox,eff), respectively. Injection of charges from the c-Si into traps in the AlOx/SiNx stack is identified as the mechanism responsible for this behavior. We conclude that in addition to fixed negative charges trapping of negative charges near the interface is a crucial mechanism contributing to the total effective negative charge of the stack. Their contribution depends on the temperature and duration of the thermal treatment. Additionally, a large Vstress leads to generation of additional Si dangling bond defects over the entire c-Si bang gap at the c-Si/AlOx interface.

The goal of this work is to find a substitute for chemically-vapour-deposited (CVD) Borophosphosilicate glass (BPSG), which is currently used as a pre-metal dielectric (PMD) for sub 50nm. Two spin-on candidates are considered, out of which one contains four weight percent (wt.%) of phosphor. First, their material properties are discussed and then their integration challenges are presented. Particularly, issues like thermal budget, direct CMP capability and compatibility to wet-cleans are explored. Then the suitable candidate is tested electrically.