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The through‑silicon via (TSV) technique is widely applied in the latest highly integrated circuits packaging. However, one of the prevalent failure modes is caused by thermal cyclic loading from power fluctuations of the chip. Different thermal expansion coefficients of Cu and Si could cause a mismatch of thermal stresses under temperature cycling, which will lead to thermal fatigue failure of structure. In the current study, thermal cycling experiments are performed on Cu-TSV samples to investigate the effect of temperature cycling on microstructure evolution and mechanical behavior. The electron backscatter diffraction analysis is conducted to investigate the grain size, local texture and microstructure evolution of Cu. Based on the crystal plasticity theory, a constitutive model considering temperature and grain size effect is developed, and the parameters are calibrated. Combining crystal plasticity theory and finite element analysis, the effects of grain orientation and different grain sizes on the stress distribution and plastic work evolution of TSV structure under thermal cyclic loading are investigated. • Thermal cycling experiments are performed to the Cu-TSV specimens. • The influence of loading cycle on the microstructure and fatigue behavior of TSV is investigated. • EBSD analysis is conducted to study the grain size and texture evolution under different loading cycles. • A CPFE model is developed to investigate the grain size and orientation effects on the fatigue behavior of TSV. [ABSTRACT FROM AUTHOR]

An analytical solution to predict electromigration-induced finger-shaped void growth in SnAgCu solder interconnect is developed based on mass diffusion theory. A quantitative nonlinear relation between the void propagation velocity and the shape evolution parameter is obtained. It is found that a circular void will grow at the lowest velocity, but as it collapses to a finger-shaped void it will grow at a faster velocity that is inversely proportional to the width. The void growth velocity predicted is consistent with the experimental observation. [ABSTRACT FROM AUTHOR]

• Propose an on-chip silicon-based integrated 3D Through-Silicon-Via Rogowski coil. • Integrate the current trace and 3D TSV Rogowski coil for in-situ current measurement. • Use ordinary differential equation method for current waveform reconstruction. • Silicon-based TSV Rogowski coil effectively enable on-chip in-situ current measurement. With the rapid advancement of microelectronics, 3D silicon-based integration microsystem technology has found widespread applications in various interconnected domains such as power generation, electric vehicles, smart grids, automation, and the Internet of Things (IoT). The high integration density within three-dimensional integrated microsystems has resulted in increasingly complex coupling between components, underscoring the critical importance of system health diagnostics. Presently, current waveform analysis, which yields valuable insights into the circuit system's condition, serves as a prevalent technique for system health assessment. However, traditional current sensors, typically packaged as discrete devices for current sensing, are inadequate for internal electrical signal detection within 3D IC microsystems. Therefore, this paper presents the design of a silicon-based integrated 3D Through-Silicon-Via (TSV) Rogowski coil tailored for in-situ electric current measurement. The structure and parasitic parameters of the 3D TSV Rogowski coil are meticulously determined through finite element method (FEM) simulations, facilitating the development of an appropriate signal processing circuit. Moreover, an Ordinary Differential Equation (ODE) current reconstruction method is proposed for measuring current. Leveraging this structural and circuit design, on-chip silicon-based integrated 3D TSV Rogowski coils are fabricated, followed by rigorous experimental validation. The experimental results convincingly attest to the effective in-situ current measurement capability of the on-chip silicon-based integrated 3D TSV Rogowski coil for 3D IC microsystems. [ABSTRACT FROM AUTHOR]

The mechanism underlying the ability of rice to germinate underwater is a largely enigmatic but key research question highly relevant to rice cultivation. Moreover, although rice is known to accumulate salicylic acid (SA), SA biosynthesis is poorly defined, and its role in underwater germination is unknown. It is also unclear whether peroxisomes, organelles essential to oilseed germination and rice SA accumulation, play a role in rice germination. Here, we show that submerged imbibition of rice seeds induces SA accumulation to promote germination in submergence. Two submergence-induced peroxisomal Oryza sativa cinnamate:CoA ligases (OsCNLs) are required for this SA accumulation. SA exerts this germination-promoting function by inducing indole-acetic acid (IAA) catabolism through the IAA-amino acid conjugating enzyme GH3. The metabolic cascade we identified may potentially be adopted in agriculture to improve the underwater germination of submergence-intolerant rice varieties. SA pretreatment is also a promising strategy to improve submerged rice germination in the field. [Display omitted] • OsCNLs are induced in rice submerged imbibition to synthesize salicylic acid (SA) • Peroxisomal OsCNLs are key enzymes in the SA biosynthetic pathway in rice • SA promotes submerged germination via OsGH3-mediated indole-acetic acid catabolism • SA pretreatment is a cost-effective strategy to improve rice submerged germination Wang et al. demonstrated a peroxisomal cinnamate:CoA ligase (CNL)-dependent phytohormone metabolic cascade in rice. Submerged imbibition-induced salicylic acid (SA) biosynthesis promotes anaerobic germination by inducing OsGH3-mediated indole-acetic acid (IAA)-amino acid conjugation, thus releasing IAA's inhibition of germination under water submergence conditions. [ABSTRACT FROM AUTHOR]

• Grain size and twin proportion affect the structural fatigue properties profoundly; • The backstress stored energy density as FIP can accurately describe the plastic flow; • Crack initiation may also occur internally in TSV-Cu structure with grain anisotropy; • Internal crack initiation is mainly caused by TBs. • Non-internal crack initiation is mainly associated with LAGBs and HAGBs. Through-silicon via (TSV) structures are widely used in microelectronic due to the ease of chip interconnection. Few research has focused on investigating the fatigue properties of TSV structures using crystal plasticity finite element (CPFE) simulations. As the process of TSV structures approaches the micron scale, the effects of anisotropic microstructure and grain size on their fatigue behaviours will become necessary. The present work aims to use CPFE simulations to investigate the fatigue properties of TSVs at the microscale. Finite element models with realistic EBSD morphology and orientation are established for four TSV structures with different grain sizes, and CPFE simulations with thermal cyclic loading from −55℃ to 125℃ are performed. From the energy point of view, the stored energy density based on backstress and strain gradient is proposed as a fatigue indicator parameter (FIP). CPFE simulation results show that low-angle grain boundaries (LAGBs) and high-angle grain boundaries (HAGBs) dominate crack initiation at the top, bottom or edges of the TSV structure, which is still mainly due to the thermal mismatch effect caused by the difference in the coefficients of thermal expansion of the materials. The crack initiation in the internal structure is mainly caused by symmetric grains containing twin boundaries (TBs), or trigrain boundaries, and this is different from the macroscopic simulations. Combined with the local FIPs concentration distribution, the backstress stored energy density is able to capture more details than the cumulative plastic strain because of its direct correlation with the strain gradient, and validates its effectiveness as a FIP. [ABSTRACT FROM AUTHOR]