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An RC relaxation oscillator (ROSC) with hybrid temperature compensation as well as the frequency of 2 MHz is proposed in this paper. Frequency stability is enhanced with analog compensation by replicating the path of comparator and level determination logic (LDL), the compensation approach removes the temperature-dependent delay of the comparator and LDL. Since frequency is undesirable at low temperatures (below 0 °C) due to non-zero-temperature-coefficient current and voltage references, as well as weak carrier mobility, digital low temperature compensation is presented to extend the oscillator's operating temperature range to −40 °C–125 °C. The digital compensation module, after hybrid compensation, is then utilized for real-time oscillator calibration by the same operating principle. The presented oscillator with hybrid compensation and real-time calibration is developed in a standard 0.18- μ m CMOS process with the active area of 0.04 mm 2 , and post-simulation results reveal that after hybrid compensation, the temperature coefficient (TC) of this oscillator is 43.97 ppm/°C in the temperature range of −40 °C–125 °C. The power of this ROSC is 185 μ W when the supply voltage is 1.8V. [ABSTRACT FROM AUTHOR]

A 1T2M logic gate design inspired by MRL logic is presented in this paper and a variety of applications based on 1T2M units are promoted. The innovation of this topic is to use the non-volatile nature of memristors with the advantage of small area and volume to constitute a NOT logic with storage function for bridging the gap of memristor-based circuits in the design of NOT gates with the MRL structure instead of transistors in conventional inverters. 1T2M is used in the improved XOR/XNOR logic, and on this basis the combinational logic circuit is designed so as to adapt to more digital circuit, in which the consumption is reduced by the high proportion of memristor in circuit. The implementations of the 1T2M structure demonstrates that 1T2M cell makes an excellent contribution to reducing circuit area and consumption through multiple comparisons. Thus the way is paved for simulating the logic function of dendrites and implementing artificial neural networks at large scale. [ABSTRACT FROM AUTHOR]