Search

Highlights: [•] DC and AC solver for biomolecules immersed in an electrolyte between electrodes. [•] 1D analytical model describing the electrolyte response to AC signals. [•] At high frequencies, the change in the nanoelectrode capacitance tends to a constant. [•] This constant is independent of the salt concentration. [•] This constant is weakly affected by the nanoparticle charge or position. [ABSTRACT FROM AUTHOR]

This paper presents a novel non-volatile memory cell architecture (BipFlash), which improves remarkably injection efficiency over that obtained with conventional channel hot-electron programming. The cell concept is validated by means of numerical device simulations including accurate Monte Carlo analysis of hot carrier transport and injection in the floating gate. Design strategies to achieve optimum device performance and possible solutions for cell layout and array organization are also discussed. We show that the superior performance of BipFlash in terms of injection efficiency can be traded to achieve either very low voltage, low power or high-speed operation. [Copyright &y& Elsevier]

• The 1/f noise formula used to extract trap densities in MOSFETs is critically re-examined. • The formula agrees with NMP models for thick dielectric devices at room temperature. • The NBT is underestimated when extracting traps from thin ILs. • The NBT extracted from thin-dielectric devices has errors up to 100×. • Neglecting gate trapping and the electrostatic scaling factor causes these errors. Noise spectroscopy is a powerful non-destructive technique to characterize the quality of gate dielectrics in MOSFETs. Trap densities are routinely extracted by fitting the 1/f part of the drain current noise spectrum with a widely known analytical expression containing several approximations within. This paper compares this 1/f noise analytical expression with microscopic simulations, evaluates its accuracy under different scenarios, and highlights when the main assumptions fall short. It is found that the expression agrees well with non-radiative multi-phonon (NMP) models at room temperature for devices featuring a thick dielectric. However, the formula fails to correctly predict the noise of nowadays aggressively scaled devices, because it neglects trapping/de-trapping with the gate electrode and the electrostatic charge scaling of the traps due to their distance from the channel. [ABSTRACT FROM AUTHOR]

This paper investigates by simulation the response of a nanoelectrode capacitive biosensor to single and double strands of DNA/PNA and up to frequencies well above the electrolyte dielectric relaxation limit. The expected change in capacitance both for an idealized two electrodes system with 2D cylindrical symmetry and a complex nanoelectrode array, where the biomolecule is represented by a dielectric and charged rod, is calculated for different positions and orientations of the strand. DNA and PNA hybridization is also considered. The results provide indications on optimum detection conditions for admittance based DNA biosensors. [ABSTRACT FROM AUTHOR]

A large number of technology applications still remain where Artificial Intelligence techniques, carefully tailored to the specific application needs, could provide performance benefits to hardware technologies. One such area is biosensing with innovative complementary-metal–oxide–semiconductor nanocapacitor arrays. These sensors operate as powerful imaging platforms but, despite the advancements in the field, the knowledge necessary for precise and robust interpretation of their response to analytes is still largely lacking. In this work, we leverage the ability of Machine Learning methods for computer vision to construct precise and robust models in different operation scenarios. By recognizing the similarity between multifrequency capacitance maps and multispectral images, we identified optimal Machine Learning algorithms to accurately estimate the size of analytes measured by the nanoelectrode array biosensor. As a relevant case study, we focus on measurements of the radius of dielectric spherical nano-particles dispersed in deionized water and phosphate buffer saline. The performance of large, established image-processing neural networks is compared to that of less complex, purposely developed ones. Sizable training data sets are generated by accurate finite element simulations of the sensor response combined with measured data. An excellent accuracy, comparable to traditional sizing technology, is achieved for the task of providing a quantitative measure of the nano-particle radius when the latter is comparable to the pitch of the pixels in the array. We report a size median error below 15% in all scenarios when a few percent of measured data samples is added to the simulation-based training data set. [ABSTRACT FROM AUTHOR]

Dielectric defects play a crucial role in the reliability of MOSFETs. In this study, we aim to gain a deeper understanding of dielectrics' degradation by correlating the effective interface (N 2 D) and bulk (N B T) trap densities extracted by different characterization techniques (I-V, charge pumping, and 1/f noise) under different electrical stress conditions. Additionally, we establish an empirical relation between the increase of N B T (estimated via 1/f noise measurements) and N 2 D , e f f (estimated through the monitoring of threshold voltage shift) after stress. This relation is useful to calculate the expected increase in 1/f noise from the V T degradation models typically made available by the foundries to circuit designers. • Comparison of electrical techniques to extract trap densities under diverse stress conditions. • 1/f noise increases with stress only in the carrier number fluctuation regime (i.e., at low gate voltage overdrives). • We derive an empirical relationship between the stress-induced increase of 1/f noise and threshold voltage shift. [ABSTRACT FROM AUTHOR]

The interplay between electrical stress and ionizing radiation effects is experimentally investigated in Si-based Tunnel Field Effect Transistors (TFETs). In particular, the impact of bias conditions on the performance degradation is discussed. We found that the electrical stress effects in TFETs could not be ignored in radiation tests, since they can possibly overwhelm the radiation-induced degradation. Under this circumstance, the worst-case bias condition for studying radiation effects is not straightforward to be determined when there is an interplay between electrical stress and ionizing radiation effects. [ABSTRACT FROM AUTHOR]

We present and thoroughly compare band-structures computed with density functional theory, tight-binding, k · p and non-parabolic effective mass models. Parameter sets for the non-parabolic Γ , the L and X valleys and intervalley bandgaps are extracted for bulk InAs, GaAs and InGaAs. We then consider quantum-wells with thickness ranging from 3 nm to 10 nm and the bandgap dependence on film thickness is compared with experiments for In 0.53 Ga 0.47 As quantum-wells. The impact of the band-structure on the drain current of nanoscale MOSFETs is simulated with ballistic transport models, the results provide a rigorous assessment of III–V semiconductor band structure calculation methods and calibrated band parameters for device simulations. [ABSTRACT FROM AUTHOR]

We present experimental data on analog device performance of p-type planar- and gate all around (GAA) nanowire (NW) Tunnel-FETs (TFETs) as well as on n-type Tri-Gate-TFETs. A significant improvement of the analog performance by enhancing the electrostatics from planar TFETs to GAA-NW-TFETs with diameters of 20 nm and 10 nm is demonstrated. A maximum transconductance of 122 μS/μm and on-currents up to 23 μA/μm at a gate overdrive of V gt = V d = −1 V were achieved for the GAA NW-pTFETs. Furthermore, a good output current-saturation is observed leading to high intrinsic gain up to 217. The Tri-Gate nTFETs beat the fundamental MOSFET limit for the subthreshold slope of 60 mV/dec and by that also reach extremely high transconductance efficiencies up to 82 V −1 . [ABSTRACT FROM AUTHOR]

Accurate Schrödinger-Poisson and Multi-Subband Monte Carlo simulations are used to investigate the effect of interface states at the channel-insulator interface of In 0.53 Ga 0.47 As MOSFETs. Acceptor states with energy inside the conduction band of the semiconductor can explain the dramatic Fermi level pinning observed in the experiments. Our results show that these states significantly impact the electrical mobility measurements but they appear to have a limited influence on the static current drive of short channel devices. [ABSTRACT FROM AUTHOR]

Abstract: We present a simple and efficient approach to implement Schottky barrier contacts in a Multi-subband Monte Carlo simulator by using the subband smoothening technique to mimic tunneling at the Schottky junction. In the absence of scattering, simulation results for Schottky barrier MOSFETs are in agreement with ballistic Non-Equilibrium Green’s Functions calculations. We then include the most relevant scattering mechanisms, and apply the model to the study of double gate Schottky barrier MOSFETs representative of the ITRS 2015 high performance device. Results show that a Schottky barrier height of less than approximately 0.15eV is required to outperform the doped source/drain structure. [Copyright &y& Elsevier]

Abstract: In this work a non-local band-to-band tunnelling model has been successfully implemented into a full-band Monte Carlo simulator and applied to Tunnel-FET devices. No stability or statistical noise problems were encountered in spite of particle weights ranging over many orders of magnitude (due to vastly different generation rates at different positions inside the device and biases) so that Tunnel-FET I–V curves could be traced over the whole on–off range. Different approaches for the choice of the tunnelling path have been compared and relevant differences are observed in both the current levels and the spatial distribution of the generated carriers. [Copyright &y& Elsevier]

Abstract: This paper proposes a simple analytical formulation for the dispersion relationship of extended electronic states in Graphene Nano-Ribbons (GNRs). The model has been validated by comparison with Tight-Binding calculation of GNRs in the presence of edge disorder. The model is suited for inclusion in semiclassical models for GNRs featuring widths down to approximately 2nm. Monte-Carlo simulations accounting for phonons and edge roughness scattering are then used to understand the ribbon width of the low-field mobility. The mechanisms responsible for the low mobility values measured in narrow ribbons compared to graphene sheets are the increased phonon scattering rate and mobility effective mass due to the strong band structure modification induced by the reduced lateral dimensions and the increased scattering with the edges. However, scattering with phonons and with edges is not sufficient to reproduce the experimental mobility on insulating substrates, suggesting that the effect of remote polar phonons originating in the substrate can be significant in graphene based devices. [Copyright &y& Elsevier]

Abstract: In this paper, we review recent developments of the Monte Carlo approach to the simulation of semi-classical carrier transport in nano-MOSFETs, with particular focus on the inclusion of quantum-mechanical effects in the simulation (using either the multi-subband approach or quantum corrections to the electrostatic potential) and on the numerical stability issues related to the coupling of the transport with the Poisson equation. Selected applications are presented, including the analysis of quasi-ballistic transport, the determination of the RF characteristics of deca-nanometric MOSFETs, and the study of non-conventional device structures and channel materials. [Copyright &y& Elsevier]

Abstract: This paper presents an analytical model for the energy dispersion of 2D hole inversion layers. In our approach, the energy dispersion along a few principal directions is described according to a conventional non-parabolic model. Then the angular dependence of the energy to wavevector relation is approximated with an analytical expression that has no fitting parameters. The overall model represents an analytical, non-parabolic and anisotropic description of the hole energy dispersion in inverted layers and it is tuned by comparisons with a quantization model based on the k · p method. The computational efficiency of the model presented in this work is suitable for its implementation in a multi-subband Monte Carlo simulator. [Copyright &y& Elsevier]

Abstract: In this paper, we present simulations of some of the most relevant transport properties of the inversion layer of ultra-thin film SOI devices with a self-consistent Monte-Carlo transport code for a confined electron gas. We show that size induced quantization not only decreases the low-field mobility (as experimentally found in [Uchida K, Koga J, Ohba R, Numata T, Takagi S. Experimental eidences of quantum-mechanical effects on low-field mobility, gate-channel capacitance and threshold voltage of ultrathin body SOI MOSFETs, IEEE IEDM Tech Dig 2001;633–6; Esseni D, Mastrapasqua M, Celler GK, Fiegna C, Selmi L, Sangiorgi E. Low field electron and hole mobility of SOI transistors fabricated on ultra-thin silicon films for deep sub-micron technology application. IEEE Trans Electron Dev 2001;48(12):2842–50; Esseni D, Mastrapasqua M, Celler GK, Fiegna C, Selmi L, Sangiorgi E, An experimental study of mobility enhancement in ultra-thin SOI transistors operated in double-gate mode, IEEE Trans Electron Dev 2003;50(3):802–8. ]), but also the electron saturation velocity and the carrier heating depend on the subband structure, and thus on the silicon film thickness. [Copyright &y& Elsevier]

This paper discusses the main issues related to the application of numerical device simulation to advanced decananometer-size MOSFETs. The main trends of CMOS technology evolution are analyzed and discussed with emphasis on the requirements imposed to device simulation programs suitable for application to the development of new, advanced technology generations. The main approaches for the simulation of carrier transport in silicon devices are briefly reviewed and their advantages and limitations are discussed. Finally, two examples of application of advanced physics-based device simulation to the analysis of the operation of state-of-the-art technologies are reported. [Copyright &y& Elsevier]