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In this study, miniaturized microwave cantilever-based probes - using silicon-on-insulator (SOI) technology - are proposed for the on-chip electrical characterization of nanodevices. In contrast with conventional on-wafer probing structures, small pad dimensions around 1 μm2 associated with a 4.5 μm-pitch are demonstrated. The probe structure, designed in coplanar technology, is optimized in order to ensure a low contact resistance. The fabrication steps of the probe structures have been developed by means of microelectromechanical systems (MEMS) technology. Measurement performance up to 50 GHz exhibit return loss better than -15 dB and insertion loss lower than -2.5 dB. [ABSTRACT FROM AUTHOR]

Abstract: For the first time, the high frequency (HF) performance of an ultra-thinned body (UTB) fully depleted silicon-on-insulator (FDSOI) incorporating TiN/HfO2 gate stack is reported. Full small signal equivalent parameters of UTB-FDSOI are extracted and analysed in detailed. It is revealed that UTB-FDSOI with longer unit width WU (same total width WTOT ) results in slightly higher gm that leads to better HF performance. Despite of the mobility degradation due to the quality of the interface between the high-K dielectric and silicon, the measured transition frequency (fT ) still corresponds well to that predicted from the ITRS roadmap. Optimising the gate stack for low RG is crucial as huge RG in the current technology is the key parameter responsible for the low fMAX obtained. This work can also be considered as the first ever experimental device measured suitable to be used for the Low STand-by Power (LSTP)-based RF/mobile application. [Copyright &y& Elsevier]