1. Reduction of Output Impedance of Buck Converter with Genetic Algorithm
- Author
-
Farzin ASADİ
- Subjects
Engineering, Electrical and Electronic ,Building and Construction ,Mühendislik, Elektrik ve Elektronik ,Electrical and Electronic Engineering ,DC-DC converters,load transients,output impedance of buck converter,State Space Averaging (SSA) - Abstract
This paper introduces a technique to reduce the output impedance in the PWM buck converters with voltage-mode control (VMC) without requiring low Equivalent Series Resistance (ESR) output capacitors. Proposed technique uses the infinity norm ( ) to convert the problem into an optimization problem. Obtained optimization problem is solved with the aid of Genetic Algorithm (GA). The proposed technique is applied to a sample buck converter operating in Continuous Conduction Mode (CCM). Simulink simulation is used to test the suggested method. Simulation results showed a considerable decrease in the low frequency region of output impedance. Such a decrease in output impedance is very desired for low voltage high current loads like computer CPU’s.
- Published
- 2022