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In order to gain further insight into the details of charge transport in organic semiconductor devices it is necessary to characterize the density of trap states at the semiconductor/gate dielectric interface. Here we use the technique of gate bias stress to quantitatively determine the interface trap density in rubrene single-crystal field-effect transistors with two different types of interfaces. A reversible and reproducible shift of the I-V characteristics is observed upon both negative and positive gate bias stress, whose physical origin is identified as charge trapping and detrapping at the crystal/SiO2 insulator interface. We can thus quantify the density of interface traps that are alternately filled and emptied on a time scale of ≅1 h in the energy range defined by the applied bias stress. For a typical rubrene/SiO2 interface we extract a density of ∼2×1012 cm-2 at a stress bias of ±50 V, corresponding to a volume density of ≅1019/(cm3 eV). An octadecyltrichlorosilane treatment of the SiO2 dielectric surface reduced this charge density by more than a factor of 2. The bulk trap density derived from space-charge-limited current measurements is typically three orders of magnitude lower, highlighting the dominant role in charge trapping played by the crystal/dielectric interface. [ABSTRACT FROM AUTHOR]

We demonstrate controllable shift of the threshold voltage and the turn-on voltage in pentacene thin film transistors and rubrene single crystal field effect transistors (FET) by the use of nine organosilanes with different functional groups. Prior to depositing the organic semiconductors, the organosilanes were applied to the SiO2 gate insulator from solution and form a self-assembled monolayer (SAM). The observed shifts of the transfer characteristics range from -2 to 50 V and can be related to the surface potential of the layer next to the transistor channel. Concomitantly the mobile charge carrier concentration at zero gate bias reaches up to 4×1012/cm2. In the single crystal FETs the measured transfer characteristics are also shifted, while essentially maintaining the high quality of the subthreshold swing. The shift of the transfer characteristics is governed by the built-in electric field of the SAM and can be explained using a simple energy level diagram. In the thin film devices, the subthreshold region is broadened, indicating that the SAM creates additional trap states, whose density is estimated to be of order 1×1012/cm2. [ABSTRACT FROM AUTHOR]

A method has been developed to inject mobile charges at the surface of organic molecular crystals, and the dc transport of field-induced holes has been measured at the surface of pentacene single crystals. To minimize damage to the soft and fragile surface, the crystals are attached to a prefabricated substrate which incorporates a gate dielectric (SiO[sub 2]) and four probe pads. The surface mobility of the pentacene crystals ranges from 0.1 to 0.5 cm[sup 2]/V s and is nearly temperature independent above ∼150 K, while it becomes thermally activated at lower temperatures when the induced charges become localized. Ruling out the influence of electric contacts and crystal grain boundaries, the results contribute to the microscopic understanding of trapping and detrapping mechanisms in organic molecular crystals. © 2003 American Institute of Physics. [ABSTRACT FROM AUTHOR]

The authors report on the modeling of the water related trap state in pentacene single crystal field-effect transistors that is created by a prolonged application of a gate voltage [C. Goldmann et al., Appl. Phys. Lett. 88, 063501 (2006)]. The authors find a trap state narrow in energy to be appropriate to explain the steplike feature measured in the subthreshold region of the transfer characteristic. The trap state forms in an interface layer next to the gate insulator and is centered at 430±50 meV above the valence band edge. The density increases from (2 to 10.5)×1018/cm3 during gate bias stress. The knowledge of the details of this defect state can help to identify the physical and chemical origin of the created trap state. [ABSTRACT FROM AUTHOR]

We report on the generation of a discrete trap state during negative gate bias stress in pentacene single-crystal “flip-crystal” field-effect transistors with a SiO2 gate dielectric. Trap densities of up to 2·1012 cm-2 were created in the experiments. Trap formation and trap relaxation are distinctly different above and below ∼280 K. In devices in which a self-assembled monolayer on top of the SiO2 provides a hydrophobic insulator surface we do not observe trap formation. These results indicate the microscopic cause of the trap state to be related to molecular layers of water adsorbed on the SiO2 surface. [ABSTRACT FROM AUTHOR]

The surface conductivity is measured by a four-probe technique for pentacene and rubrene single crystals laminated on polarized and nearly unpolarized molecular monolayers with application of perpendicular electric fields. The polarization of the self-assembled monolayers (SAMs) shifts the threshold gate voltage, while maintaining a very low subthreshold swing of the single-crystal devices (0.11 V/decade). The results, excluding influences of parasitic contacts and grain boundaries, demonstrate SAM-induced nanoscale charge injection up to ∼1012 cm-2 at the surface of the organic single crystals. [ABSTRACT FROM AUTHOR]