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Pixel Array Detectors (PADs) consist of an x-ray sensor layer bonded pixel-by-pixel to an underlying readout chip. This approach allows both the sensor and the custom pixel electronics to be tailored independently to best match the x-ray imaging requirements. Here we describe the hybridization of CdTe sensors to two different charge-integrating readout chips, the Keck PAD and the Mixed-Mode PAD (MM-PAD), both developed previously in our laboratory. The charge-integrating architecture of each of these PADs extends the instantaneous counting rate by many orders of magnitude beyond that obtainable with photon counting architectures. The Keck PAD chip consists of rapid, 8-frame, in-pixel storage elements with framing periods <150 ns. The second detector, the MM-PAD, has an extended dynamic range by utilizing an in-pixel overflow counter coupled with charge removal circuitry activated at each overflow. This allows the recording of signals from the single-photon level to tens of millions of x-rays/pixel/frame while framing at 1 kHz. Both detector chips consist of a 128×128 pixel array with (150 µm)² pixels. [ABSTRACT FROM AUTHOR]

Development of a new detector using Silicon-On-Insulator (SOI) technology has been started in the Photon Factory, KEK. The aim of this project is to develop a pulse-counting-type X-ray detector that can be used in synchrotron radiation experiments using soft X-rays. We started to make a Test Element Group of SOI chip, which is called CPIXPTEG1 and evaluated its performance. We succeeded in readout of output signals for 16 keV X-rays from the SOI chips. We also found that the middle-SOI structure was effective against a signal distortion caused by hole traps in the buried oxide layer. [ABSTRACT FROM AUTHOR]