1. Improving communication in PGAS environments: Static and dynamic coalescing in UPC
- Author
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José Nelson Amaral, Michail Alvanos, Ettore Tiotto, Montse Farreras, Xavier Martorell, Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, and Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
- Subjects
020203 distributed computing ,Software engineering ,Computer science ,Informàtica::Enginyeria del software [Àrees temàtiques de la UPC] ,One-sided communication ,Optimizing compiler ,02 engineering and technology ,Parallel computing ,Unified parallel c ,020202 computer hardware & architecture ,Data mapping ,Unified Parallel C ,0202 electrical engineering, electronic engineering, information engineering ,Code (cryptography) ,Performance evaluation ,Overhead (computing) ,Partitioned global address space ,Enginyeria de programari ,Programmer ,computer ,computer.programming_language ,Compile time - Abstract
The goal of Partitioned Global Address Space (PGAS) languages is to improve programmer productivity in large scale parallel machines. However, PGAS programs may have many fine-grained shared accesses that lead to performance degradation. Manual code transformations or compiler optimizations are required to improve the performance of programs with fine-grained accesses. The downside of manual code transformations is the increased program complexity that hinders programmer productivity. On the other hand, most compiler optimizations of fine-grain accesses require knowledge of physical data mapping and the use of parallel loop constructs. This paper presents an optimization for the Unified Parallel C language that combines compile time (static) and runtime (dynamic) coalescing of shared data, without the knowledge of physical data mapping. Larger messages increase the network efficiency and static coalescing decreases the overhead of library calls. The performance evaluation uses two microbenchmarks and three benchmarks to obtain scaling and absolute performance numbers on up to 32768 cores of a Power 775 machine. Our results show that the compiler transformation results in speedups from 1.15X up to 21X compared with the baseline versions and that they achieve up to 63% the performance of the MPI versions.
- Published
- 2013