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A structure of junction edge termination for the High- K Vertical Diffused Metal Oxide Silicon (H K -VDMOS) is proposed and studied. It consists of two deep trenches filled with SiO 2 and H K dielectric, respectively. The former is mainly used to sustain the surface high voltage, which significantly contributes to reduce the termination width. The latter transmits the strong electric field in the SiO 2 into the source electrode before it reaches the inside H K -VDMOS cells, which ensures the optimized electric field distribution of the inside H K -VDMOS cells is not affected. Therefore, for the total device with termination, high breakdown voltage and ultralow specific on-resistance as well as very small termination width can be simultaneously obtained. Numerical simulation shows that, for an N-type H K -VDMOS (the permittivity is set as K = 300) with the proposed termination, the R on,sp of 26.4 mΩ cm 2 is achieved at a breakdown voltage of 743 V, where the termination width is only 14 μm. [ABSTRACT FROM AUTHOR]