Search

In this article, we propose a new family of modular hybrid resonant switched tank converters (HRSTC) to perform high fixed-ratio 48 V-to-intermediate bus voltage down-conversion in data center applications. These topologies exploit a modular approach to address the challenge of achieving compact and efficient high voltage conversion ratio in a configurable way. The HRSTC leverages the use of a multitapped autotransformer (MTA) to enhance the conversion ratio of the switched-capacitor converter structure. In addition, using the residual energy of the MTA leakage and magnetizing inductances, quasi-zero current switching and zero voltage switching commutation is achieved. After introducing, deriving, and analyzing the HRSTC structures, we present a prototype converter for 48-to-3.4 V nominal voltage conversion at 260 A maximum output current. The developed prototype achieves a peak efficiency of 96.6 % and a power density of 920 W/inch3. This prototype validates the expected operation and performance of the HRSTC.

In this paper, a wide-input-range buck converter with a dual time-based PWM and PFM control is presented. The time-based PWM control features novel line feedforward and adaptive gain techniques to speed up line transient response and keep the loop gain crossover frequency almost constant over the input voltage range. The same line-feedforward circuitry is also exploited to perform seamless transitions from PFM to PWM mode and boost efficiency at medium and light loads. A 1.4-A prototype converter with 5-to-32-V input and 3.3-V output voltage, fabricated in a 180-nm BCD process, shows a 3x reduction in the line transient response and a control loop bandwidth with limited dependence on the input voltage. PFM-to-PWM transitions are achieved with no output voltage variation thanks to the phase-shift preset. The PFM quiescent current including bias network, controller and drivers in no-load operation is $14~\mu $ A. The die area is 3.74 mm2, while the controller occupies 0.31 mm2.

Inductor current feedback (ICF) has been recently proposed to mitigate the adverse effect of the right-half-plane zero (RHPZ) in nonminimum phase boost converters. Basically, ICF is used to move the RHPZ into the left-half-plane, leading to increased closed-loop stability. This article systematically investigates the impact of the ICF mitigation technique on the dynamic performance of the converter. It is shown that both line and load transient responses are still limited by the RHPZ despite the exploitation of ICF. Compared to a boost converter equipped with a properly designed proportional-integral-derivative controller, the use of ICF leads to a load transient response with similar peak overshoots/undershoots but slower settling time, whereas the line transient response shows a significant reduction in the peak overshoots/undershoots. The theoretical analysis and the proposed design guidelines are verified with SIMetrix/SIMPLIS and MATLAB/Simulink simulations. Experimental results from a prototype boost converter designed for 2.3–4.5 V to 5 V voltage conversion, 800 mA load current capability, provide further validation.

Compared with analog and digital controls, time-based control makes it possible to reduce both area occupation and power consumption, especially in converters operating at high switching frequencies. In this article, we present a time-based buck converter with a wide input voltage range for general-purpose applications. A controlled-skip operation is embedded in the proportional–integral–derivative controller to increase the light-load efficiency. To avoid large variations of the open-loop crossover frequency caused by the input voltage ranging from 5 to 36 V, an adaptive compensation of the controller gain is adopted based on a novel design methodology. These solutions are verified with a prototype buck converter implemented in a 0.18-$\mu$m bipolar-CMOS-DMOS (BCD) process, which provides an output voltage of 3.3 V and a load current capability of 1 A. The measured converter peak efficiency is 90%. The efficiency is increased from 48% to 70% at 10-mA load current and 5 V input voltage, when the converter operates in a controlled-skip mode. The seamless transition between the two operation regimes is guaranteed by a finite-state machine logic, without requiring a dedicated circuit. The crossover frequency varies only by a factor of 1.8 over the input voltage range and a line regulation of 0.33 $\text {mV}/\text {V}$ is obtained.