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AlGaAs is a promising integrated nonlinear photonics material with enormous optical nonlinearity and high refractive index. Nevertheless, presently AlGaAs microring resonators exhibiting high-quality factors and tight optical confinement rely predominantly on wafer bonding techniques, which entail an intricate fabrication process. Here, we present suspended AlGaAs waveguides and resonators as a viable platform for high efficiency integrated nonlinear photonics. The suspended microring resonator formed by combined plasma dry etching and chemical wet etching exhibits an intrinsic quality factor Q of 2.1 × 10 6 , corresponding to an optical loss of 0.28 dB/cm, and Kerr comb generation with milliwatt level threshold is recorded. The proposed scheme can be implemented with a relatively simple fabrication process, as it eliminates the need for wafer bonding. Without the hinderance of SiO 2 or Al 2 O 3 claddings, the air-clad suspended AlGaAs platform lends itself directly to applications in the mid-infrared region. Our demonstration opens up a prospect for employing AlGaAs devices in integrated nonlinear photonics. [ABSTRACT FROM AUTHOR]

3D neuromorphic hardware system is first demonstrated in neuromorphic application as on‐chip level by integrating array devices with CMOS circuits after wafer bonding (WB) and interconnection process. The memory window of synaptic device is degraded after WB and 3 Dimesional (3D) integration due to process defects and thermal stress. To address this degradation, Ag diffusion in materials of Ta2O5 and HfO2 is studied in a volatile memristor, furthermore, the interconnection and gate metal Ru are investigated to reduce defective traps of gate interface in non‐volatile memory devices. As a result, a memory window is improved over 106 in both types of devices. Improved and 3D integrated 12 × 14 array devices are identified in the synaptic characteristics according to the change of the synaptic weight from the interconnected Test Element Group (TEG) of the Complementary Metal Oxide Semiconductor (CMOS) circuits. The trained array devices present recognizable image of letters, achieving an accuracy rate of 92% when utilizing a convolutional neural network, comparing the normalized accuracy of 93% achieved by an ideal synapse device. This study proposes to modulate the memory windows up to 106 in an integrated hardware‐based neural system, considering the possibility of device degradation in both volatile and non‐volatile memory devices demonstrated by the hardware neural system. [ABSTRACT FROM AUTHOR]

In this study, we focus on the development of key processes towards wafer-scale 3-dimentional/vertical (3D) integration of Indium-Phosphide (InP) photonic membranes on InP electronics via adhesive bonding. First, we identified the most critical steps and optimized them to achieve high thermal and mechanical compatibility of components for the co-integration process. Next, we developed a strategy for InP-to-InP wafer bonding with high topology tolerance, and introduced hard benzocyclobutene (BCB) anchors to preserve the alignment and BCB thickness uniformity after bonding. The resulting bond layer is homogeneous in terms of physical and mechanical properties. Finally, we developed a novel method to selectively remove the InP substrate from the photonics side via wet etching while protecting the electronics carrier wafer with hermetic multi-layer coatings. The investigation of these key steps is essential for scalable 3D integration of photonics and electronics at ultra short distances (< $15 ~\mu \text{m}$). [ABSTRACT FROM AUTHOR]

This paper introduces a cost-effective, high-performance approach to achieving wafer level vacuum packaging (WLVP) for MEMS-based uncooled infrared sensors. Reliable and hermetic packages for MEMS devices are achieved using a cap wafer that is formed using two silicon wafers, where one wafer has precise grating/moth-eye structures on both sides of a double-sided polished wafer for improved transmission of over 80% in the long-wave infrared (LWIR) wavelength region without the need for an AR coating, while the other wafer is used to form a cavity. The two wafers are bonded using Au-In transient liquid phase (TLP) bonding at low temperature to form the cap wafer, which is then bondelectrical and Electronics d to the sensor wafer using glass frit bonding at high temperature to activate the getter inside the cavity region. The bond quality is assessed using three methods, including He-leak tests, cap deflection, and Pirani vacuum gauges. Hermeticity is confirmed through He-leak tests according to MIL-STD 883, yielding values as low as 0.1 × 10−9 atm·cc/s. The average shear strength is measured as 23.38 MPa. The package pressure varies from 133–533 Pa without the getter usage to as low as 0.13 Pa with the getter usage. [ABSTRACT FROM AUTHOR]

Gallium Phosphide (GaP) has recently received considerable attention as a suitable material for building photonic integrated circuits due to its remarkable optical and piezoelectric properties. Usually, GaP is grown epitaxially on III–V substrates to keep its crystallinity and later transferred to silicon wafers for further processing. Here, an alternative promising route for the fabrication of optomechanical (OM) cavities on GaP epitaxially grown on nominally (001)‐oriented Si is introduced by using a two‐step process consisting of a low‐temperature etching of GaP followed by selective etching of the underneath silicon. The low‐temperature (–30 °C) during the dry‐etching of GaP hinders the lateral etching rate, preserving the pattern with a deviation between the design and the pattern in the GaP layer lower than 5%, avoiding the complex process of transferring and bonding a GaP wafer to a silicon‐on‐insulator wafer. To demonstrate the quality and feasibility of the proposed fabrication route, suspended OM cavities are fabricated and experimentally characterized. The cavities exhibit optical quality factors between 103 and 104 at telecom wavelengths, and localized mechanical resonances ≈3.1 GHz with quality factors ≈63 when measured at room temperature. These results suggest a simple and low‐cost way to build GaP‐based photonic devices directly integrated on industry‐standard Si(001) photonic wafers. [ABSTRACT FROM AUTHOR]

Fast atom beam (FAB) source is used for surface activated bonding. This process is attracting attention as an essential process for next-generation semiconductor manufacturing. Traditional wafer direct bonding processes require annealing or cannot be directly bonded at room temperature. Therefore, there are restrictions on the materials that can be bonded and the combinations of materials that can be bonded. However, surface activated bonding has made it possible to directly bond dissimilar materials at room temperature. This technology is expected to be applied to the manufacturing of various MEMS and three-dimensional stacking of semiconductors. This bonding process involves bombarding the wafer surface with fast argon atom beam in a vacuum chamber. Irradiation removes oxide layer and contaminants, exposing dangling bonds. By pressing the wafers together, the dangling bonds are bonded together, and a strong bond is achieved. The device that generates this fast argon atom beam is FAB source. This device has been of the type that generates a saddle field electric field. However, this FAB source had a narrow beam irradiation area and was unable to support the recent increase in wafer diameter. Therefore, it was necessary to perform irradiation using multiple FAB sources. At production sites, there is a need to develop new FAB sources that can irradiate large areas. In this study, we developed FAB source in which the beam is generated by parallel plate electrodes. We performed a comparison with the saddle field type FAB source and found that the performance was inferior in initial experiments. Next, we improved the design to operate at higher voltages and increased the aperture area. Through these improvements, we have achieved performance superior to the saddle field type FAB source. [ABSTRACT FROM AUTHOR]

The high curing temperatures required for traditional benzocyclobutene (BCB) materials have posed limitations on their applicability in high‐temperature‐sensitive fields. To address this challenge, our work focuses on the synthesis of a novel tetraphenylethylene (TPE)‐functionalized BCB monomer, TPE–BCB, achieved through the introduction of an ether bond onto the BCB's four‐membered ring via Williamson reaction. TPE–BCB demonstrates remarkable low‐temperature curing properties, characterized by a ring‐opening peak temperature of 190°C, representing a reduction of 60°C compared to conventional BCBs. Fully cured TPE–BCB resins exhibit exceptional dielectric and mechanical properties, coupled with minimal water absorption. Additionally, the incorporation of TPE with aggregation‐induced emission characteristics enhances the resins' luminescence and photolithographic capabilities. Notably, our TPE–BCB resins achieve impressive photolithography performance with a resolution ratio of up to 10 μm. In contrast to conventional BCB‐functionalized resins, TPE–BCB offers the dual advantage of low‐temperature curing and luminescence. This development marks a significant step in the advancement of low‐temperature curing BCB materials and serves as a pioneering example in the realm of multilayer wafer bonding materials. [ABSTRACT FROM AUTHOR]

The reduction of the series resistance in multi‐junction solar cells is of high importance for attaining peak efficiencies in concentrator photovoltaics. This study showcases strategies to reduce the sheet resistance of the uppermost subcell of a direct wafer bonded four–junction devices, since it contributes significantly to the series resistance. Therefore, electron mobilities in n–type AlGaInP, lattice matched to GaAs, are investigated across bandgap energies between 1.9 and 2.1 eV and various doping concentrations. The sheet resistances for AlGaInP rear heterojunction cells are determined for the integration in a two terminal four‐junction solar cell. The rear heterojunction cell architecture effectively addresses the sheet resistance optimization because it features a thick n‐type doped absorption layer. The sheet resistance of our current world record quadruple‐junction solar cell with 47.6% efficiency under the 665‐fold concentrated AM1.5d spectrum is 550 Ω sq−1. Herein, it is shown that optimizing the n‐absorption layer in the 1.90 eV GaInP top cell can reduce the sheet resistance to 250 Ω sq−1 without deteriorating the short–circuit current density and current matching. This reduction corresponds to a 5 mΩ cm2 improvement in specific series resistance, which would elevate the efficiency of this device to 48.2%. [ABSTRACT FROM AUTHOR]

High-temperature microfluidic devices (such as gas chromatography microcolumns) have traditionally been fabricated using photolithography, etching, and wafer bonding which allow for precise microscale features but lack the ability to form complex 3D designs. Metal additive manufacturing could enable higher complexity microfluidic designs if reliable methods for fabrication are developed, but forming small negative features is challenging--especially in powder-based processes. In this paper, the formation of sealed metal microchannels was demonstrated using stainless-steel binder jetting with bronze infiltration. To create small negative features, bronze infiltrant must fill the porous part produced by binder jetting without filling the negative features. This was achieved through sacrificial powder infiltration (SPI), wherein sacrificial powder reservoirs (pore size ~60 µm) are used to control infiltrant pressure. With this pressure control, the infiltrant selectively filled the small pores between particles in the printed part (pore size ~3 µm) while leaving printed microchannels (700 µm and 930 µm) empty. To develop the SPI method, a pore filling study was performed in this stainless-steel/bronze system with 370 µm, 650 µm, and 930 µm microchannel segments. This study enabled SPI process design on these length scales by determining variations in pore filling across a sample and preferential filling between different sized pores. [ABSTRACT FROM AUTHOR]

An integrated optical isolator is a crucial part of photonic integrated circuits (PICs). Existing optical isolators, predominantly based on the silicon-on-insulator (SOI) platform, face challenges in integrating with active devices. We propose a broadband, compact TM mode Mach–Zehnder optical isolator based on InP-on-insulator platforms. We designed two distinct magneto-optical waveguide structures, employing different methods for bonding Ce:YIG and InP, namely O2 plasma surface activation direct wafer bonding and DVS-benzocyclobutene (BCB) adhesive bonding. Detailed calculations and optimizations were conducted to enhance their non-reciprocal phase shift (NRPS). At a wavelength of 1550 nm, the direct-bonded waveguide structure achieved a 30 dB bandwidth of 72 nm with a length difference of 0.256 µm. The effects of waveguide arm length, fabrication accuracy, and dimensional errors on the device performance are discussed. Additionally, manufacturing tolerances for three types of lithographic processes were calculated, serving as references for practical manufacturing purposes. [ABSTRACT FROM AUTHOR]

Bodies made from elastically stiff material usually bind very weakly unless the surfaces are flat and extremely smooth. In direct wafer bonding flat surfaces bind by capillary bridges and by the van der Waals interaction, which act between all solid objects. Here we study the dependency of the work of adhesion on the humidity and surface roughness in hydrophilic direct wafer bonding. We show that the long-wavelength roughness (usually denoted waviness) has a negligible influence on the strength of wafer bonding (the work of adhesion) from the menisci that form from capillary condensation of water vapor. AFM surface topography for Si(100) wafer [ABSTRACT FROM AUTHOR]

Room temperature wafer bonding is a desirable approach for the packaging and assembly of diverse electronic devices. The formation of SiO 2 layer at the bonding interface is crucial for a reliable wafer bonding as represented by conventional bonding techniques such as hydrophilic bonding and glass frit bonding. This paper reports a novel concept of room temperature wafer bonding based on the conversion of polysilazane to SiO 2 at the bonding interface. As polysilazane is converted to SiO 2 by hydrolysis, in this work, adsorbed water is introduced to the bonding interface by plasma treatment, thereby facilitating the formation of SiO 2 at the wafer bonding interface. The experimental results indicate that the adsorbed water from the plasma treatment diffuses into the polysilazane layer and facilitates its hydrolysis and conversion. The proposed method demonstrates the successful wafer bonding at room temperature with high bond strength without interfacial voids. This technique will provide a new approach of bonding wafers at room temperature for electronics packaging. [ABSTRACT FROM AUTHOR]

Purpose: Wafer bonding is a key process for 3 D advanced packaging of integrated circuits. It requires very high accuracy for the wafer alignment. To solve the problems of large movement stroke, position calibration error and low production efficiency in optical alignment, this paper aims to propose a new wafer magnetic alignment technology (MAT) which is based on tunnel magneto resistance effect. MAT can realize micro distance alignment and reduces the design and manufacturing difficulty of wafer bonding equipment. Design/methodology/approach: The current methods and existing problems of wafer optical alignment are introduced, and the mechanism and realization process of wafer magnetic alignment are proposed. Micro magnetic column (MMC) marks are designed on the wafer by the semiconductor manufacturing process. The mathematical model of the space magnetic field of the MMC is established, and the magnetic field distribution of the MMC alignment is numerically simulated and visualized. The relationship between the alignment accuracy and the MMC diameter, MMC remanence, MMC thickness and sensor measurement height was studied. Findings: The simulation analysis shows that the overlapping double MMCs can align the wafer with accuracy within 1 µm and can control the bonding distance within the micrometer range to improve the alignment efficiency. Originality/value: Magnetic alignment technology provides a new idea for wafer bonding alignment, which is expected to improve the accuracy and efficiency of wafer bonding. [ABSTRACT FROM AUTHOR]

• Monolithic lithium niobate microfluidic chips are realized by facile fabrication. • Room temperature H 2 plasma proton exchange enhances the bonding performance. • High-density and diverse functional groups on the surface of lithium niobate. • Lithium niobate channel processing with high etching rate and smooth morphology. • The superior performance of full lithium niobate structure in SAW applications. In the quest to enhance the functionality and efficiency of lab-on-a-chip systems, integrating diverse physical phenomena such as acoustics, optics, and electronics into a single platform has emerged as a pivotal strategy. Lithium niobate (LiNbO 3 , or LN) stands out for its exceptional piezoelectric and electro-optic properties, making it an ideal candidate for such integrated systems. However, the full exploitation of LN in microfluidic applications has been hindered by the complex challenges associated with its fabrication. Addressing this gap, our research introduces a facile fabrication method for creating monolithic LN microfluidic chips. By employing a proton exchange-assisted surface-activated bonding technique, we achieve high-strength, flawless bonding at lower temperatures, overcoming the traditional barriers of LN machining. This method eliminates the chemical stability of LN by removing lithium ions and significantly enriches the surface with functional groups, leading to a bonding strength exceeding 10 MPa after annealing at 150 °C. Additionally, we have optimized an argon plasma etching process to ensure the creation of smooth LN channels at room temperature. The development of a fully integrated LN chip through this approach demonstrates superior performance, especially in surface acoustic wave (SAW) applications, compared to conventional PDMS/LN hybrids. This breakthrough not only realizes the fabrication process of LN microfluidic devices but also opens new avenues for the advancement of integrated microsystems across various scientific and technological domains. [ABSTRACT FROM AUTHOR]

[Display omitted] • Bonding interface is modified to a homogenous one with an epitaxial layer. • Epitaxial layer constrains the defects, disperses and reduces the heterogenous mismatch stress. • Epitaxial layer is doped to reduce the carrier recombination leakage current in this defect-rich layer. In the realm of optoelectronic integration, silicon-based Ge bonding has attracted great attention due to its advantages in short-wave infrared response and low cost. However, owing to the inherent lattice mismatch and thermal mismatch between Ge and Si, the bonded Ge-Si heterogenous interfaces encountered problems of thermal instability and high interface states. Herein, an approach of separating the bonding interface from the heterogenous interface is proposed through inserting a Ge epitaxial layer (GeEL) between the Si substrate and Ge film. This separation modifies the bonding interface to a homogenous one, alleviating the massive mismatch stress and achieving film relaxation, enhancing bonding stability in all aspects. Moreover, during 850 °C annealing, GeEL is doped via diffusion hence realizes electric filed modulation, inhibiting the carrier recombination leakage current and trap assisted tunneling in this defect-rich layer. A Ge-Si heterogenous PIN diode prepared by this bonding method has achieved a remarkable low dark current density (1.33 mA/cm2), a low ideality factor (1.11), and a high on–off ratio (1 0 6), confirming the outstanding quality of the bonded heterojunction. This work provides great prospects for higher performance, larger scale and multi-functional Si-based heterogenous material device applications. [ABSTRACT FROM AUTHOR]

[Display omitted] • Innovatively employed first-principles calculations to analyze the atomic-level bonding principles of heterogeneous wafer bonding interfaces. • Combines molecular dynamics and reaction kinetics for a multidisciplinary approach. • Presents eight interface models to explore bonding mechanisms. • Investigated annealing and oxygen plasma activation effects for optimizing bonding processes in optoelectronic integration. The direct bonding mechanism of Si/InP is systematically investigated using first-principles calculations. Charge density analysis reveals that Si can be bonded with either In or P and is polar covalent. The single Si-P bond is stronger than the Si-In bond and has a shorter bond length, the Si-P bond length is 2.356 Å compared to 2.590 Å for the Si-In ones, as it involves the sharing of electron pairs and a large transfer and redistribution of electrons. Notably, molecular dynamics simulations show that the interfacial strength of Si bonded to In is greater at room temperature. This is because, after sufficient relaxation, although the average strength of the Si-P bonds is still greater than that of Si-In, the number of Si-In bonds is approximately four times that of the Si-P bonds. The radial distribution function of the atoms in the interfacial layer further confirms that the terminal interface is stronger than the P-terminal interface. Appropriate annealing treatment can effectively increase the number and strength of bonds at the interface. Finally, the bonding mechanism of the oxygen plasma activation is studied using reaction kinetics. These findings contribute to the precise control and optimization of bonding processes, ultimately improving the reliability of optoelectronic integration. [ABSTRACT FROM AUTHOR]

We report a low-temperature and low-cost wafer-bonding method for silicon (Si) and indium phosphide (InP) based on a microcrystalline germanium (Ge) interlayer. The sputtered amorphous Ge (a-Ge) annealed at different temperatures exhibited different crystallinities. It is fully crystallized when the sputtering is carried out at 400 °C. For the microcrystalline Ge sputtered on the Si and InP, the Ge crystallizes along the crystal orientation of the Si, and exhibits a polycrystalline state on the InP. The crystallization evolution, bubble evolution, and bonding strength evolution at the wafer-bonded interface are investigated. The mechanism by which the bubbles are eliminated is revealed. In the case of samples featuring microcrystalline Ge grown on Si, the bonding interface consists of single crystal Ge. Bubbles can only escape from the bonding interface through atomic migration. Due to lattice mismatch and lack of gas transport channels, bubbles and dislocations form at the bonding interface. The samples with microcrystalline Ge grown simultaneously on Si substrate and InP wafer have a polycrystalline Ge layer (poly-Ge) at the bonding interface, which acts as a lattice barrier and gas transport channel. The combined action of lattice blocking and channeling effectively removes bubbles and dislocations at the bonding interface. After post-annealing, the bonding strength of the sample with fully crystallized intermediate layer can reach the bulk fracture strength of InP wafers. In addition, the carrier transport mechanism at the InP/Si bonding interface is also clearly elucidated. The above findings provide a direction for the preparation of high-performance Si-based III-V compound semiconductor photodetectors. • Microcrystalline Ge semiconductor interlayer is proposed to realize InP/Si bonding. • The InP/Si lattice is isolated by polycrystalline Ge and the dislocation nucleation is eliminated. • The crystallization status of microcrystalline Ge on Si and InP is clarified. • The process unveils bubble fade out at bonded interfaces via gas removal by atomic recombination and polycrystalline Ge. • A microcrystalline Ge layer is introduced to eliminate the influence of the oxide layer. [ABSTRACT FROM AUTHOR]

This paper proposes a novel method for friction-induced chemical reaction machining of single-crystal 4H-SiC wafers using pure iron. Material Removal Rate (MRR) and surface quality of single-crystal 4H-SiC were studied, and the results demonstrate that both high surface quality and high MRR (Ra: 2.2 nm, MRR: 375 nm/min) were obtained. The mechanism of material removal during friction was investigated by examining the critical roles of friction speed. Solid-state chemical reactions between metal and SiC surfaces can be induced by friction, and the subsequent removal of reactants, resulting in a near-damage-free machined surface. A removal mechanism model of friction was established, which reveals that both the rates of solid-state reaction and reactant removal significantly impact the final removal rate of friction. [Display omitted] • A novel friction-induced chemical removal method single crystal 4H-SiC wafer was proposed. • High surface quality and high MRR (Ra: 2.2 nm, MRR: 375 nm/min) were obtained for a 4-inch wafer. • 4H-SiC with near-damage-free surface/subsurface were obtained. • Solid-state chemical reaction occurred at low speed, pressure, and temperature. [ABSTRACT FROM AUTHOR]