293 results on '"Rooyackers, R."'
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2. FinFETs and Their Futures
3. Low-Voltage Scaled 6T FinFET SRAM Cells
4. Nanoprober-based EBIC measurements for nanowire transistor structures
5. Analysis of trap-assisted tunneling in vertical Si homo-junction and SiGe hetero-junction Tunnel-FETs
6. Impact of process and geometrical parameters on the electrical characteristics of vertical nanowire silicon n-TFETs
7. Bulk FinFET fabrication with new approaches for oxide topography control using dry removal techniques
8. Ultra High Voltage Electron Microscopy Study of {113}-Defect Generation in Si Nanowires
9. Drive current enhancement in p-tunnel FETs by optimization of the process conditions
10. Gate-edge charges related effects and performance degradation in advanced multiple-gate MOSFETs
11. Performance improvement in narrow MuGFETs by gate work function and source/drain implant engineering
12. Multi-gate devices for the 32 nm technology node and beyond
13. Multi-gate devices for the 32 nm technology node and beyond: Challenges for Selective Epitaxial Growth
14. Seedless Templated Growth of Hetero-Nanostructures for Novel Microelectronics Devices
15. Spacer defined FinFET: Active area patterning of sub-20 nm fins with high density
16. Evaluation of triple-gate FinFETs with SiO 2–HfO 2–TiN gate stack under analog operation
17. FinFETs and Their Futures
18. Processing factors influencing the leakage current in shallow junction diodes for deep submicro-meter CMOS
19. Minimization of specific contact resistance in multiple gate NFETs by selective epitaxial growth of Si in the HDD regions
20. Evaluation of Triple-Gate FinFETS with High-k Dielectrics and TiN Gate Materials Under Analog Operation
21. Low Temperature Operation of Undoped Body Triple-Gate FinFETs from an Analog Perspective
22. Shift and ratio method revisited: extraction of the fin width in multi-gate devices
23. Shallow trench isolation dimensions effects on leakage current and doping concentration of advanced p–n junction diodes
24. Comparison between proton irradiated triple gate SOI TFETS and finfets from a TID point of view
25. SSRM and SCM observation of modified lateral diffusion of As, BF2 and Sb induced by nitride spacers.
26. SSRM and SCM Observation of Enhanced Lateral As- and BF2-diffusion Induced by Nitride Spacers
27. Lifetime study in advanced isolation techniques
28. The use of convergent beam electron diffraction for stress measurements in shallow trench isolation structures
29. Investigation of stress in shallow trench isolation using UV micro-Raman spectroscopy
30. First demonstration of similar to 3500 cm(2)/V-s electron mobility and sufficient BTI reliability (max V-ov up to 0.6V) In0.53Ga0.47As nFET using an IL/LaSiOx/HfO2 gate stack
31. Performance of differential pair circuits designed with line tunnel FET devices at different temperatures.
32. Performance of differential pair circuits designed with line tunnel FET devices at different temperatures
33. Opposite trends between digital and analog performance for different TFET technologies
34. The impact of the temperature on In0.53Ga0.47As nTFETs
35. Record performance Top-down In0.53Ga0.47As vertical nanowire FETs and vertical nanosheets
36. Experimental analysis of differential pairs designed with line tunnel FET devices
37. Impact of the Zn diffusion process at the source side of InxGa1−xAs nTFETs on the analog parameters down to 10 K
38. Proton radiation effects on the self-aligned triple gate SOI p-type tunnel FET output characteristic
39. First demonstration of ∼3500 cm2/V-s electron mobility and sufficient BTI reliability (max Vov up to 0.6V) In0.53Ga0.47As nFET using an IL/LaSiOx/HfO2 gate stack
40. Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures
41. Analysis of the transistor efficiency of gas phase Zn diffusion In0.53Ga0.47As nTFETs at different temperatures
42. A New Direction for III–V FETs for Mobile CPU Operation Including Burst-Mode: In0.35Ga0.65As Channel
43. InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature
44. The Smaller the Noisier? Low Frequency Noise Diagnostics of Advanced Semiconductor Devices
45. Fabrication and Analysis of a Si/Si0.55Ge0.45 Heterojunction Line Tunnel FET
46. Analog parameters of solid source Zn diffusion InXGa1−XAs nTFETs down to 10 K
47. Impact of InxGa1−x composition and source Zn diffusion temperature on intrinsic voltage gain in InGaAs TFETs
48. Top-down InGaAs nanowire and fin vertical FETs with record performance
49. Record mobility (μeff ∼3100 cm2/V-s) and reliability performance (Vov∼0.5V for 10yr operation) of In0.53Ga0.47As MOS devices using improved surface preparation and a novel interfacial layer
50. Beyond-Si materials and devices for more Moore and more than Moore applications
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