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Neuromorphic computing research is being actively pursued to address the challenges posed by the need for energy-efficient processing of big data. One of the promising approaches to tackle the challenges is the hardware implementation of spiking neural networks (SNNs) with bio-plausible learning rules. Numerous research works have been done to implement the SNN hardware with different synaptic plasticity rules to emulate human brain operations. While a standard spike-timing-dependent-plasticity (STDP) rule is emulated in many SNN hardware, the various STDP rules found in the biological brain have rarely been implemented in hardware. This study proposes a CMOS-memristor hybrid synapse circuit for the hardware implementation of a Ca ion-based plasticity model to emulate the various STDP curves. The memristor was adopted as a memory device in the CMOS synapse circuit because memristors have been identified as promising candidates for analog non-volatile memory devices in terms of energy efficiency and scalability. The circuit design was divided into four sub-blocks based on biological behavior, exploiting the non-volatile and analog state properties of memristors. The circuit was designed to vary weights using an H-bridge circuit structure and PWM modulation. The various STDP curves have been emulated in one CMOS-memristor hybrid circuit, and furthermore a simple neural network operation was demonstrated for associative learning such as Pavlovian conditioning. The proposed circuit is expected to facilitate large-scale operations for neuromorphic computing through its scale-up. [ABSTRACT FROM AUTHOR]

Gate-tunable transmons (gatemons) employing semiconductor Josephson junctions have recently emerged as building blocks for hybrid quantum circuits. In this study, we present a gatemon fabricated in planar Germanium. We induce superconductivity in a two-dimensional hole gas by evaporating aluminum atop a thin spacer, which separates the superconductor from the Ge quantum well. The Josephson junction is then integrated into an Xmon circuit and capacitively coupled to a transmission line resonator. We showcase the qubit tunability in a broad frequency range with resonator and two-tone spectroscopy. Time-domain characterizations reveal energy relaxation and coherence times up to 75 ns. Our results, combined with the recent advances in the spin qubit field, pave the way towards novel hybrid and protected qubits in a group IV, CMOS-compatible material. A gatemon is a transmon-type superconducting qubit made using a hybrid superconductor-semiconductor approach enabling tunability with electric gates. Here the authors demonstrate a gatemon qubit in planar germanium, which is anticipated to have various advantages. [ABSTRACT FROM AUTHOR]

We investigate a hybrid device allowing a photon–phonon coupling of a transmission line radiation (TLR) and a nanoeletromechanical system (NEMS), mediated by a superconducting qubit population imbalance. We demonstrate the derivation of an effective Hamiltonian for the strongly dispersive regime for this system. The qubit works as a quantum switch, allowing a conditioned transfer of excitations between the TLR and NEMS. We show that this regime allows the system to be employed for signal processing and force estimation. Additionally, we explore the ability of the quantum switch to generate non-classical states. [ABSTRACT FROM AUTHOR]

With rapid development of high voltage direct current (HVDC) grids, hybrid circuit breakers (HCBs) have gained more attentions, due to their great ability for fault current interruption in HVDC grids. This paper proposes a novel low-cost HCB based on the coupled inductor, to be utilized in HVDC applications. To realize high current breaking capability with low cost, a coupled inductor in combination with the bridge-type circuit is utilized in the breaker branch. The bridge-type circuit is constructed by the series connection of a not pre-charged capacitor, thyristor, and diodes to provide bidirectional breaking ability. After an interruption, the capacitor in the breaker branch can be discharged quickly to guarantee that the proposed HCB is available for the next interruption. Detailed analysis and design equations are also provided to describe the operation of proposed HCB. The proposed HCB is simulated in Matlab/Simulink and simulations are used to analyze the performance of the HCB under the different conditions. Moreover, the proposed DCCB topology is validated using prototype experiments. [ABSTRACT FROM AUTHOR]

Mass-deployable implementations for quantum communication require compact, reliable, and low-cost hardware solutions for photon generation, control and analysis. We present a fiber-pigtailed hybrid photonic circuit comprising nonlinear waveguides for photon-pair generation and a polymer interposer reaching 68 dB of pump suppression and photon separation based on a polarizing beam splitter with > 25 dB polarization extinction ratio. The optical stability of the hybrid assembly enhances the quality of the entanglement, and the efficient background suppression and photon routing further reduce accidental coincidences. We thus achieve a 96 - 8 + 3 % concurrence and a 96 - 5 + 2 % fidelity to a Bell state. The generated telecom-wavelength, time-bin entangled photon pairs are ideally suited for distributing Bell pairs over fiber networks with low dispersion. [ABSTRACT FROM AUTHOR]

Spins are prototypical systems with the potential to probe magnetic fields down to the atomic scale limit. Exploiting their quantum nature through appropriate sensing protocols allows to enlarge their applicability to fields not always accessible by classical sensors. Here we first show that quantum sensing protocols for AC magnetic fields can be implemented with molecular spin ensembles embedded into hybrid quantum circuits. We then show that, using only echo detection at microwave frequency and no optical readout, Dynamical Decoupling protocols synchronized with the AC magnetic fields can enhance sensitivity up to S ≈ 10−10 − 10−9 T Hz−1/2 with a low (4-5) number of applied pulses. These results paves the way for the development of strategies to exploit molecular spins as quantum sensors. [ABSTRACT FROM AUTHOR]

In the field of fault isolation and clearance in flexible DC power grids, hybrid DC circuit breakers (HDCCB) have been widely used because of their advantages. However, their development is limited by high construction costs and inapplicability in some fault cases. In addition, adaptive reclosing capability is required for overhead DC lines with high fault probability. Therefore, this paper proposes a new type of multi-port hybrid DC circuit breaker (MP-HDCCB) with current limiting, breaking, and self-charging capabilities. The capacitor polarity reversal circuit is designed to reduce the influence of capacitor pre-charging on the normal operation of the system and to solve the problem of two consecutive line faults occurring in a short period of time. In addition, the circuit breaker can limit the current and break in the face of a single line fault, multiple line faults at the same time, and bus faults. It also has the ability of adaptive reclosing and normal operation of the line after a bus fault. Based on the proposed topology, a 500 kV four-terminal DC system is designed, and a model is established in PSCAD/EMTDC to verify the capabilities of the circuit breaker. Results show that the circuit breaker has adaptive reclosing capability and can realize fault current limiting and breaking under different fault conditions. [ABSTRACT FROM AUTHOR]

In recent years, with the rapid development of high-voltage flexible direct current (DC) transmission systems, more and more multi-port high-voltage DC systems have been successfully put into operation. Therefore, the number of connecting ports on the DC bus is gradually increasing, which necessitates higher requirements for clearing fault current. To better protect the DC power grid, this paper integrates a DC fault current limiter with a multi-port DC circuit breaker. This article proposes a modular cascaded multi-port hybrid DC circuit breaker topology. It also elaborates on the topology structure, working principle, and control program under three different fault conditions. It completes the theoretical derivation and analysis of the circuit breaker fault isolation process, as well as the parameter design of the core components. Finally, a model is established in PSCAD/EMTDC for simulation verification. The application performance of the circuit breaker in four-terminal DC systems is studied and analyzed, and the current-limiting effect of the multi-port DC circuit breaker proposed in this article is demonstrated. In addition, the disconnection performance and energy consumption of the arrester have been improved to a certain extent, which has good feasibility and economy. [ABSTRACT FROM AUTHOR]

As synthetic biology permeates society, the signal processing circuits in engineered living systems must be customized to meet practical demands. Towards this mission, novel regulatory mechanisms and genetic circuits with unprecedented complexity have been implemented over the past decade. These regulatory mechanisms, such as transcription and translation control, could be integrated into hybrid circuits termed "multi-level circuits". The multi-level circuit design will tremendously benefit the current genetic circuit design paradigm, from modifying basic circuit dynamics to facilitating real-world applications, unleashing our capabilities to customize cellular signal processing and address global challenges through synthetic biology. As synthetic biology permeates society, the signal processing circuits in engineered living systems must be customized to meet practical demands. In this review, the authors outline design strategies for the DNA, RNA, and protein-level circuits and the hybrid "multi-level" circuits. [ABSTRACT FROM AUTHOR]

In this paper, a controllable hybrid plasmonic integrated circuit (CHPIC) composed of hybrid plasmonic waveguide (HPW)-based rhombic nano-antenna, polarization beam splitter, coupler, filter, and sensor has been designed and investigated for the first time. In order to control the power into a corresponding input port, a graphene-based 1 × 3 power splitter with switchable output has been exploited. The functionality of each device has been studied comprehensively based on the finite element method and the advantages over state-of-the-art have been compared. Moreover, the effect of connection of CHPIC to the photonic and plasmonic waveguides has been studied to exhibit the capability of variety excitation methods of the CHPIC. Furthermore, the performance of the proposed CHPIC connected to inter/intra wireless transmission links has been investigated. The wireless transmission link consists of two HPW-based nano-antennas as transmitter and receiver with the maximum gain and directivity of 10 dB and 10.2 dBi, respectively, at 193.5 THz. The suggested CHPIC can be used for applications such as optical wireless communication and inter/intra-chip optical interconnects. [ABSTRACT FROM AUTHOR]

Flexible direct current (DC) grids face a serious challenge in terms of rapidly isolating DC faults. A DC circuit breaker is an effective solution for DC fault isolation. To improve the fault-isolation and reclosing capability of flexible DC systems, a new high voltage direct current (HVDC) circuit breaker topology with adaptive reclosing capability is proposed in this paper. The topology of the circuit breaker is a T-shaped structure, which has the ability to break the current in both directions and effectively reduce the cost of components. Meanwhile, after the fault is cleared, the circuit breaker is controlled to inject a voltage signal into the line. Based on this, to prevent the circuit breaker reclosing in the event of a permanent fault from having an impact on the system, a method for fault identification based on Euclidean distance that uses the voltage signal to identify the fault properties is proposed. Finally, the performance of the circuit breaker is simulated and verified by PSCAD/EMTDC simulation software, and compared with the typical existing circuit breakers to verify the effectiveness of the circuit breaker and reclosing scheme. [ABSTRACT FROM AUTHOR]

Reconfigurable transistors are an emerging device technology adding new functionalities while lowering the circuit architecture complexity. However, most investigations focus on digital applications. Here, we demonstrate a single vertical nanowire ferroelectric tunnel field-effect transistor (ferro-TFET) that can modulate an input signal with diverse modes including signal transmission, phase shift, frequency doubling, and mixing with significant suppression of undesired harmonics for reconfigurable analogue applications. We realize this by a heterostructure design in which a gate/source overlapped channel enables nearly perfect parabolic transfer characteristics with robust negative transconductance. By using a ferroelectric gate oxide, our ferro-TFET is non-volatilely reconfigurable, enabling various modes of signal modulation. The ferro-TFET shows merits of reconfigurability, reduced footprint, and low supply voltage for signal modulation. This work provides the possibility for monolithic integration of both steep-slope TFETs and reconfigurable ferro-TFETs towards high-density, energy-efficient, and multifunctional digital/analogue hybrid circuits. Increasing functional density is desirable for future scaling of electronics. Here, the authors use a nanowire ferroelectric tunnel field-effect transistor to achieve reconfigurable signal modulations for low-power and high-density analogue circuits. [ABSTRACT FROM AUTHOR]

Nowadays, traditional DC circuit breakers (DCCBs) are always expensive and lack current-limiting capabilities. Hence, this paper proposes a current limiting and low-cost hybrid DC circuit breaker (HCB). When a fault occurs, the paralleled inductors in the proposed HCB are converted to a series connection due to the cutoff of the converter module, effectively limiting the increase of fault current. Then the cascaded IGBTs undertake the transient interruption voltage. Energy dissipation circuits (EDCs) reduce the fault isolation time (FIT) by bypassing the current-limiting inductor during energy dissipation based on the metal oxide varistors (MOVs). Therefore, the proposed HCB can limit the rate of the fault current increase, reducing the FIT and cost. Finally, the feasibility of the proposed HCB is verified by a single-ended equivalent system and DC grid test systems built in PSCAD/EMTDC. In addition, the proposed HCB FIT is 33.7% quicker, its energy consumption is 87%, and its cost is lower than that of the traditional ABB HCB. [ABSTRACT FROM AUTHOR]

In this paper, Astable Multivibrator (AMV) circuits are designed and simulated using pure Carbon Nanotube Field Effect Transistors (CNTFETs) as well as hybrid CNT-CMOS technology, and simulation results are compared with conventional CMOS technology by varying the value of resistor- 'R', capacitor- 'C', supply voltage- 'Vdd' and temperature- 'T'. It has been found that novel CNT-based AMV outperforms conventional CMOS-based AMV and the performance of hybrid circuits exists between PURE-CNT-AMV and CMOS-AMV. The rise time and fall time of PURE-CNT-AMV are improved by 97.2% and 96.5% respectively as compared to CMOS-AMV, which increases the speed of operation of the circuit. A significant improvement of approximately 3515% is observed in the slew rate of PURE-CNT-AMV and also, the amplitude of the output square wave is increased by 0.91%. In addition, the maximum usable frequency for PURE-CNT-AMV is increased by 656.96% as compared to CMOS-AMV. Furthermore, the behavior of CNT-based AMV circuits is also analyzed by varying the number of CNTs- 'N', inter CNT pitch- 'S' and CNT diameter- 'DCNT' at R = 50kΩ, C = 1 pf and Vdd = 0.9 V. However, the power dissipation of PURE-CNT-AMV is 3.7% higher than CMOS-AMV which can be improved by adjusting the value of 'R–C' delay network, operating the circuit at lower supply voltage, and choosing the optimum value of N, S and DCNT. [ABSTRACT FROM AUTHOR]

A transient multi-physics model incorporated with an electromagneto-thermomechanical coupling is developed to capture the multi-field behavior of a single-pancake (SP) insert no-insulation (NI) coil in a hybrid magnet during the charging and discharging processes. The coupled problem is resolved by means of the finite element method (FEM) for the magneto-thermo-elastic behaviors and the Runge-Kutta method for the transient responses of the electrical circuits of the hybrid superconducting magnet system. The results reveal that the transient multi-physics responses of the insert NI coil primarily depend on the charging/discharging procedure of the hybrid magnet. Moreover, a reverse azimuthal current and a compressive hoop stress are induced in the insert NI coil during the charging process, while a forward azimuthal current and a tensile hoop stress are observed during the discharging process. The induced voltages in the insert NI coil can drive the currents flowing across the radial turns where the contact resistance exists. Therefore, it brings forth significant Joule heat, causing a temperature rise and a uniform distribution of this heat in the coil turns. Accordingly, a thermally/mechanically unstable or quenching event may be encountered when a high operating current is flowing in the insert NI coil. It is numerically predicted that a quick charging will induce a compressive hoop stress which may bring a risk of buckling instability in the coil, while a discharging will not. The simulations provide an insight of hybrid superconducting magnets under transient start-up or shutdown phases which are inevitably encountered in practical applications. [ABSTRACT FROM AUTHOR]

Four optical combinational circuits based on hybrid plasmonic waveguides utilizing squared-shaped nanoring resonators have been presented, designed, and studied standing on finite element method with COMSOL software package version 5.5. The optical combinational circuits half adder, half subtractor, full adder, and 4-bit binary to gray converter have been established in a layout with dimensions of 850 nm × 400 nm and 1750 nm × 400 nm for the 4-bit converter. The leading guide to building these optical circuits is the constructive and destructive interference founded on the phase shift angles between the input ports and the control port(s). The performance of the four optical combinational circuits has been evaluated based on the transmission value at each output port which has a threshold of 30%, contrast ratio, modulation depth, and insertion loss, with a system for an operating wavelength of 1310 nm. The transmission exceeds 100% in the full adder, in the output carry of the half adder, and in the most significant bit of the 4-bit binary to gray converter with a 202.6% each. Forty-six decibels is the value of the contrast ratio in the most significant bit of the converter and 99.99% as a modulation depth for the sum output of the full adder. [ABSTRACT FROM AUTHOR]

Hybrid perovskite solar cell technology has a distinct advantage over the conventional solar cell technologies due to its high predicted efficiency and low manufacturing cost. However, its commercialization is hindered by the unpredictability existing in its J-V characteristics leading to ambiguous efficiency estimation. Modeling the hysteresis in the J-V characteristics is a means of curtailing this ambiguity. It is established in literature that hysteresis models can be derived from the non-linear behavior of ferroelectric materials. Perovskite, which forms the light absorbing region of the solar cell is a ferroelectric material. In this paper, an equivalent circuit model for the hybrid perovskite solar cell is proposed in which the reasons for origin of hysteresis is characterized as varying capacitance to model hysteresis. A Landau–Khalatnikov subcircuit which portrays this variation is the principal addition to the conventional model to include hysteresis effect. The model parameters of the subcircuit are estimated from the inherent properties of perovskites. Hence, the proposed equivalent circuit model is completely physics based and it links the material property of perovskite to its equivalent circuit model parameters. [ABSTRACT FROM AUTHOR]

One of the urgent tasks in the design of hybrid integrated circuits (HICs) is the construction of adapter-attenuators of film absorbing elements that provide a wide range of attenuations with the given values of input and output resistances. Known versions of adapter-attenuators based on homogeneous and piecewise-homogeneous resistive films provide a resistance transformation ratio of not more than 3 and 10–12, respectively. The paper proposes promising topologies of adapter-attenuators for HICs with an almost optimal profile of the input and output contacts. It is shown that these topologies make it possible not only to obtain a wide range of transformation ratios (more than 100) but also to reduce the maximum values of the potential gradient and power density by a factor of 10 to 30. When calculating the rectangular topology, the apparatus of the theory of functions of a complex variable is used. The optimized topology of adapter-attenuators for HICs is modeled by the finite element method implemented in the Elcut software package. The calculated ratios and graphs that show the relationship between attenuation, the transformation ratio, gain in the potential gradient, and power density depending on the ratio of the dimensions of the film element and the specific resistances of the resistive films used are presented. The features of fitting adapter-attenuators are considered. The results obtained are important for the operation of the film element of adapter-attenuators for well logging in the pulsed mode. [ABSTRACT FROM AUTHOR]

A conventional hybrid circuit breaker (HCB) is used to protect a voltage source converter-based high voltage direct current transmission system (VSC-HVDC) from a short circuit fault. With the increased converter capacity, the DC protection equipment also requires a regular upgrade. This paper adopts a novel type of HCB with a fault current limiter circuit (FCLC), and focuses on the responses of voltage and current during DC faults, which are associated with parameter selection. PSCAD/EMTDC based simulation of a three-terminal VSC-HVDC system confirms the effectiveness and value of HCB with FCLC, by using an equivalent circuit modelling approach. Laboratory experimental tests validate the simulation results. The peak fault current is reduced according to the current limiting inductor (CLI) increase, and can be isolated more quickly. By adopting parallel metal oxide arrester (MOA) with the main branch of HCB, voltage stresses across the breaker components decrease during transient and continuous operation, and less energy needs to be dissipated by the MOA. The remnant current for all cases is transmitted to power dissipating resistor (PDR) in the final stage, and the fault current is reduced to the lowest possible value. When the current from the main branch is transferred to the FCLC branch, transient voltage spikes occur, while smaller PDR is required to absorb current in the final stage. [ABSTRACT FROM AUTHOR]

This paper proposes a thyristor-based hybrid DC circuit breaker (HDCCB), which is composed of a fast mechanical circuit breaker and an LC resonant circuit with thyristor switches. The proposed HDCCB provides a zero-crossing point for fault current by injecting a resonant current in the reverse direction of the fault current. The proposed HDCCB has a low conduction loss in normal operation using a mechanical circuit breaker, and it offers the advantages of low cost, high reliability, and large capacity using thyristor switches instead of IGBT switches. It also has the design flexibility to adjust the magnitude of the injection current depending on the fault current level. A bidirectional HDCCB is also proposed by adding several components to the developed unidirectional HDCCB, which can offer compact system size and low system cost. Design considerations of the proposed structure are discussed. The validity of the proposed HDCCB is verified by simulation and experimental results. [ABSTRACT FROM AUTHOR]

We present a one-step method to realize a multi-qubit controlled phase gate of multiple nitrogen-vacancy-center ensembles (NV ensembles). This multi-qubit phase gate is based on cross-Kerr nonlinearities, which are enabled by a superconducting flux qutrit dispersively coupled to multiple NV ensembles. Since the flux qutrit is not populated during the operation, the effect of qutrit decoherence is greatly suppressed. Moreover, the gate operation time is independent of the number of NV ensembles. Numerical simulations show that high-fidelity construction of a four-qubit controlled phase gate with four NV ensembles is feasible with present hybrid circuit QED technology. [ABSTRACT FROM AUTHOR]

Servo circuit of quartz flexible accelerometer is an important signal processing unit in inertial measurement system. This paper introduced the working principle of the quartz flexible accelerometer and the composition of the servo circuit. Taking the output saturation of a quartz flexible accelerometer during the test process of inertial measurement unit as an example, according to the failure analysis process of hybrid integrated accelerometer servo circuit and the fault tree analysis based on accelerometer servo circuit fault diagnosis expert system, the fault location and failure analysis of the failed circuit are carried out, and the failure mechanism and causes are studied and analyzed. The analysis results show that the failure circuit is caused by electrical damage to the differential capacitance detector in the differential capacitance–voltage converter. In view of this problem, the prevention and improvement measures are put forward to reduce the frequency of the failure mode. Above analysis and research are of guiding significance to improve the fault analysis technology and the use reliability of servo circuit of hybrid integrated quartz flexible accelerometer. [ABSTRACT FROM AUTHOR]

Stable and efficient guided waves are essential for information transmission and processing. Recently, topological valley-contrasting materials in condensed matter systems have been revealed as promising infrastructures for guiding classical waves, for they can provide broadband, non-dispersive and reflection-free electromagnetic/mechanical wave transport with a high degree of freedom. In this work, by designing and manufacturing miniaturized phononic crystals on a semi-infinite substrate, we experimentally realized a valley-locked edge transport for surface acoustic waves (SAWs). Critically, original one-dimensional edge transports could be extended to quasi-two-dimensional ones by doping SAW Dirac "semimetal" layers at the boundaries. We demonstrate that SAWs in the extended topological valley-locked edges are robust against bending and wavelength-scaled defects. Also, this mechanism is configurable and robust depending on the doping, offering various on-chip acoustic manipulation, e.g., SAW routing, focusing, splitting, and converging, all flexible and high-flow. This work may promote future hybrid phononic circuits for acoustic information processing, sensing, and manipulation. Here the authors provide experimental evidence of extended topological valley-locked states. By splicing together Dirac semimetals and topological insulators, they demonstrate reduced backscattering and enhanced matching of SAW with interdigital transducers proposing this system for topological acoustics devices. [ABSTRACT FROM AUTHOR]

Memristor–CMOS (MCM) technology enables fabrication of thin film memristors over the conventional CMOS devices and has the potential to significantly reduce the silicon-area and propagation delays in VLSI chips. The memristor not only has an extremely very useful characteristic of non-volatile memory, but also has the advantage of significantly lesser ON resistance R on and lesser undesired parasitic capacitance as compared to MOSFETs. Innovative MCM hybrid re-configurable circuits can outperform conventional CMOS-only design and hence are being considered as an important device for future digital VLSI applications. This paper presents applications of TiO 2 - x – TiO 2 memristor for digital multivibrator circuits at 45 nm CMOS technology node. The threshold adaptive memristor SPICE model has been used for design and performance-benchmarking of the proposed MCM multivibrators in circuit simulator (cadence®) at 45 nm technology node. The proposed new MCM mono-stable vibrator has a delay of merely 16 ps (98% lower delay than similar CMOS design) and requires a 45% lesser silicon area. Similarly, the proposed new MCM bi-stable vibrator has a delay of merely 5 ps (87% lower delay than similar CMOS design) and requires a 25% lesser silicon area. Moreover, the proposed MCM mono-stable and bi-stable multivibrators consume merely 0.1 μ W and 0.5 μ W of power, respectively, as compared to the 0.47 μ W and 0.98 μ W power required by corresponding CMOS-only multi-vibrators. The overall decrease in power delay product is 99% and 94%, respectively, in the proposed MCM mono-stable and bi-stable multivibrators as compared to the corresponding conventional CMOS-only multivibrators. [ABSTRACT FROM AUTHOR]

For the development of the market of modern microelectronics, methods are required that allow continuously increasing the productivity and energy efficiency of semiconductor products and, at the same time, reducing the required minimum area of the crystal while maintaining its functionality. Therefore, the integration of nonvolatile elements (memristors) and CMOS technologies, as well as the creation of methods for synthesizing digital circuits with smmristor functional units—memristor logic (MeMOS logic)—are urgent problems. The paper proposes a block method for the synthesis of hybrid MeMOS circuits, using minterm maps, which makes it possible to simultaneously synthesize a MeMOS circuit and optimize it. Examples of the synthesis of combinational (Exclusive OR) and sequential (RS-trigger) schemes. The existing and new variants of solutions to problems of the synthesis of combinational and sequential integrated circuits with memristors are considered. It is shown that the average power dissipated RS-trigger is 7.7 μW for the standard logic and 2.2 μW for the memristor logic. The power consumption of the XOR circuit is 13 μW for the standard logic and 9.2 μW for the memristor logic. [ABSTRACT FROM AUTHOR]

Hybrid printed circuit heat exchangers (H-PCHE) consisting of plate and fin bonded to a microchannel heat-exchanger have been designed for generation IV nuclear power. This manuscript discusses the ability of 316 stainless steel (316SS) to be utilized as a candidate alloy for these H-PCHE's. Sheets of 316SS were stacked together and diffusion bonded. The tensile behavior of this diffusion bonded 316SS composite was investigated in two orientations: tensile stress applied parallel and perpendicular to the sheet plane. Different mechanical properties were found for each orientation, which has implications for modeling of performance and creep lifetimes of H-PCHEs. Further, the effect of a post-bond heat treatment was found to increased the overall ductility of the bonded specimen. [ABSTRACT FROM AUTHOR]

Due to the rapid development of DC transmission, research on DC side fault protection has also made significant progress. The bipolar short-circuit fault is one of the most severe types of DC side faults. It can cause a current surge, which affects the safe operation of a system. Therefore, this paper proposes a new type of hybrid DC circuit breaker (DCCB) to realize the rapid suppression of bipolar short-circuit current. The new DCCB consists of three parts: a nominal current branch (NCB), an energy absorption branch (EAB), and a freewheeling branch (FB). Different control strategies can be adopted to achieve line protection functions for different types of faults. For transient faults, the absorption and suppression of the fault current are achieved mainly through the EAB and FB. The DCCB ensures that the amplitude of the current delivered by the DC line is maintained in a safe operating area of the transmission line. The EAB is disconnected after a short-term of operation for permanent faults to achieve complete isolation between the converter side and the fault side. The parameter design of the DCCB is carried out to provide a reference for the practical application of this research. Finally, the effectiveness of the proposed DCCB protection strategy is verified by simulations, and the function of the DCCB is further verified by experiments. [ABSTRACT FROM AUTHOR]

Wireless power transfer (WPT) has the advantages of flexibility, safety, and high reliability. Thus, it is widely used in portable electronic equipment, electric vehicles (EV), medical equipment, and other fields. The resonance compensation method of wireless charging directly affects the gain characteristics of the output current and voltage. As a result, this is one of the main research focuses of wireless power transmission technology. A new hybrid compensation topology circuit is proposed in this paper, which is based on the EV constant-current (CC) and constant-voltage (CV) charging mode. In this hybrid topology circuit, an equivalent loosely coupled transformer T model is established for the primary and secondary coils. Through an analysis of the circuit principle, it is concluded that the wireless power transmission circuit can realize CC and CV outputs under a dynamic load change. The output power efficiency characteristics of the serial/parallel (S/P) compensation and serial/serial (S/S) compensation circuits are analyzed. In addition, the mutual inductance parameters are optimized by an efficiency power product method to achieve the overall optimal parameter design in terms of the circuit output power and efficiency. A simulation model and an experimental prototype of the wireless power transmission circuit are established. The design process of the circuit parameters under a given target current and voltage is also presented. The simulation verifies the correctness of the constant current and constant voltage output of the S/P–S/S hybrid compensation circuit. The experimental platform verifies the CC output under the S/P compensation topology, and the CV output under the serial/serial (S/S) compensation topology. [ABSTRACT FROM AUTHOR]

The emerging interconnections of renewable energy sources that generate DC power have resulted in demands on DC grid systems. In this situation, a low-voltage DC (LVDC) grid system could be a solution for these DC power sources. For the reliable operation of a LVDC grid, DC faults are an issue and DC circuit breakers (DC CBs) are appropriate devices to clear fault current. However, there are some difficulties in terms of breaking DC faults such as the absence of zero crossing of the current and voltage, and the high di/dt of the fault current. This paper proposes a hybrid circuit breaker (HCB) with a new structure for a LVDC grid system. The main switch consists of a vacuum interrupter (VI) and a permanent magnetic actuator (PMA). Some improvements are proposed to enhance the performance of the PMA. A bi-directional commutation loop consisting of a minimum number of power electronic devices is suggested. To absorb fault energy, a capacitor and a diode loop are applied. The principle of the proposed HCB and the design methods for all of the components are analyzed. Through a simulation model, the designed components are selected and verified. Experimental results with a realized prototype (750 V/300A) verify the design method and its performance. [ABSTRACT FROM AUTHOR]

This is the first report on the efficient coupling of light between two chief hybrid plasmonic waveguides, the HMIM and HIMI having complementary structures. The study may be useful in the design and development of hybrid plasmonic integrated circuits for various applications in which coupling light from one plasmonic waveguide to another may be indispensable. The proposed coupler consists of a flared section of HMIM waveguide with linear taper coinciding with the cross section of HIMI waveguide. It offers a good transmission of more than 95% in the wavelength range 1500–1575 nm. The entire structure occupies a footprint area of 2.4 × 1 μ m 2 and it is CMOS compatible for on-chip applications. [ABSTRACT FROM AUTHOR]

Quantum machine learning recently gained prominence due to the computational ability of quantum computers in solving machine learning problems that are intractable on a classical computer. However, achieving a quantum advantage on present-day quantum computers remains an open challenge. In this work, we primarily focus on solving machine learning problems using a hybrid model based on both quantum and classical computers together for the classification task. We propose the quantum multi-class classifier (QMCC) as a variational circuit with a hybrid classical-quantum approach using quantum mechanical properties such as superposition and entanglement. A unitary operation on a single qubit for the state preparation is designed and also demonstrated using a real quantum computer on the IBMQX platform. The entire variational circuit for the classification task is implemented on a quantum simulator. We performed our quantum simulations on three benchmark datasets: Iris dataset, Banknote Authentication (BNA) dataset, and Wireless Indoor Localization (WIL) dataset for machine learning algorithms. Our simulation results show that the proposed QMCC model classified Iris dataset with an accuracy of 92.10%, BNA dataset with an accuracy of 89.50%, and WIL dataset with an accuracy of 91.73%. The proposed model can also be extended to multiple class classifiers. [ABSTRACT FROM AUTHOR]

With the rapid development of DC transmission technology, DC circuit breakers, the key equipment for DC fault handling, have become a research hotspot of scholars. This paper proposes a novel hybrid DC circuit breaker topology to improve the shortcomings of traditional hybrid DC circuit breakers. Traditional hybrid DC circuit breakers use too many IGBTs, which results in a large volume and a high cost. The main innovation of this topology is the use of a mechanical switch in series in a solid-state branch, which withstands most of the voltage. An oscillating circuit is in parallel on the mechanical switch, which can generate reverse current to reduce the current flowing through the mechanical switch to zero, to achieve arc free breaking. The feasibility of the proposed topology is verified based on a PSCAD simulation platform. It should serve as a valuable reference for the design of DC distribution systems and DC breakers. [ABSTRACT FROM AUTHOR]

Interest in creating and studying silicon-based InSb nanocrystals is due to the need for hybrid integrated circuits involving elements with different functional properties. Optical phonons localized in low-dimension crystals can affect both the optical and electrical properties of these crystals. The optical-phonon properties of InSb nanocrystals ion-beam synthesized in silicon and InSb nanocrystals formed in SiO2 layers by ion-beam synthesis and rf magnetron sputtering are compared. The properties of optical phonons in InSb nanocrystals are explained in terms of the effect of the structural properties of the surrounding matrix. [ABSTRACT FROM AUTHOR]

Resistive random-access memory (ReRAM) has several attractive features such as high storage density and high switching frequency with low power consumption. It is hence regarded as the most promising nonvolatile memory material. However, a memristor, which is a primitive component of the ReRAM-based memory, has much lower write endurance. Hence, an error-correcting code (ECC) circuit is indispensable for realizing reliable ReRAM storage. Accordingly, we propose a hybrid CMOS/memristor-based ECC circuit. In the proposed circuit, the blocks with high-frequency write operations are implemented using the conventional CMOS technology and the other blocks are implemented using the memristors to maintain a balance between the area overhead and reliability. Through numerical experiments, we demonstrate that the proposed ECC circuit achieves smaller area and higher reliability than the full memristor-based ECC circuits and achieves much smaller area while preserving the reliability compared with the full CMOS-based ECC circuits. [ABSTRACT FROM AUTHOR]

Current implementations of quantum logic gates can be highly faulty and introduce errors. In order to correct these errors, it is necessary to first identify the faulty gates. We demonstrate a procedure to diagnose where gate faults occur in a circuit by using a hybridized quantum-and-classical K-Nearest-Neighbors (KNN) machine-learning technique. We accomplish this task using a diagnostic circuit and selected input qubits to obtain the fidelity between a set of output states and reference states. The outcomes of the circuit can then be stored to be used for a classical KNN algorithm. We numerically demonstrate an ability to locate a faulty gate in circuits with over 30 gates and up to nine qubits with over 90% accuracy. [ABSTRACT FROM AUTHOR]

Photonic integrated circuits (PICs) are revolutionizing nanotechnology, with far-reaching applications in telecommunications, molecular sensing, and quantum information. PIC designs rely on mature nanofabrication processes and readily available and optimised photonic components (gratings, splitters, couplers). Hybrid plasmonic elements can enhance PIC functionality (e.g., wavelength-scale polarization rotation, nanoscale optical volumes, and enhanced nonlinearities), but most PIC-compatible designs use single plasmonic elements, with more complex circuits typically requiring ab initio designs. Here we demonstrate a modular approach to post-processes off-the-shelf silicon-on-insulator (SOI) waveguides into hybrid plasmonic integrated circuits. These consist of a plasmonic rotator and a nanofocusser, which generate the second harmonic frequency of the incoming light. We characterize each component's performance on the SOI waveguide, experimentally demonstrating intensity enhancements of more than 200 in an inferred mode area of 100 nm2, at a pump wavelength of 1320 nm. This modular approach to plasmonic circuitry makes the applications of this technology more practical. Chip-scale modular components are important for nanophotonic applications. Here, the authors demonstrate post-processing of a silicon-on-insulator waveguide into an integrated hybrid plasmonic circuit, consisting of a plasmonic rotator and a nanofocusser module, which together result in nanoscale nonlinear wavelength conversion. [ABSTRACT FROM AUTHOR]

A direct current (DC) to DC converter with soft switching and high efficiency is developed for industry power units with a wide range of output voltage applications. A series resonant converter is the main circuit on the primary side to accomplish the soft switching characteristics for the active devices and rectifier diodes without switching loss or reverse recovery current loss. To overcome the drawback of the limited operation input or output voltage range in conventional LLC converters, a hybrid resonant converter including a half-bridge circuit and a full-bridge circuit with auxiliary windings is developed to achieve 8:1 (Vo,max = 8Vo,min) output voltage characteristics for a wide range of output voltage applications. To achieve this function, two AC power switches are used in the developed circuit. Since a single-stage hybrid resonant converter is presented instead of a two-stage converter to realize wide voltage range operation, the developed circuit has better efficiency when compared to conventional LLC converters and two-stage DC–DC converters. To confirm the circuit analysis and effectiveness, a prototype with a 400 W rated power was built and tested. [ABSTRACT FROM AUTHOR]

In modern satellite communication systems and airborne repeaters using an APAR, the receiving and transmitting modules usually consist of discrete phase shifters such as hybrid integrated circuits or monolithic circuits. In this paper, we consider an open-frame analog-digital phase shifter module with a 0°–360° phase change that allows ensuring the accuracy of setting the discrete phase to not more than 0.5° based on the domestic control UHF MIS varicaps. An original L-range analog-digital phase shifter with a 0°–360° phase change using a Lange bridge and phase-shifting cells based on four UHF MIS varicaps is proposed. The requirements for the type of volt-farad characteristic and the capacitance overlap coefficient of the MDP-varicap capacitance are determined. Even at the limiting (critical) UHF MIS-varicap frequency not higher than 15 GHz, the proposed scheme of the analog-digital phase shifter allows ensuring the phase shifter loss that is not greater than 1.5 dB in the L-band. The analog-digital phase shifter with a 0°–360° phase change was operated by the digital control board. An 8-bit DAC was used. The division value of the discrete control of the phase shifter is 1.4° at 256 DAC states. The obtained characteristics of the precision analog-digital phase shifter allow concluding on the propects of its use for solving synchronization problems of an active radio target simulator in testing synthetic aperture radars, as well as in the receiving and transmitting modules of a low-element APAR for the L-band. [ABSTRACT FROM AUTHOR]

A soft switching converter with wide voltage range operation is investigated in this paper. A series resonant converter is implemented to achieve a high circuit efficiency with soft switching characteristics on power switches and rectifier diodes. To improve the weakness of the narrow voltage range in LLC converters, an alternating current (ac) power switch is used on the primary side to select a half-bridge or full-bridge resonant circuit to implement 4:1 voltage range operation. On the secondaryside, another ac power switch is adopted to select a full-wave rectifier or voltage-doubler rectifier to achiever an additional 2:1 output voltage range. Therefore, the proposed resonant converter has the capacity for 8:1 (320V~40V) wide output voltage operation. A single-stage hybrid resonant converter is employed in the study circuit instead of a two-stage dc converter to achiever wide voltage range operation. As a result, the study converter has better converter efficiency. The theoretical analysis and circuit characteristics are verified by experiments with a prototype circuit. [ABSTRACT FROM AUTHOR]

This research work explores various circuit-level design techniques to identify the best technique suitable for low power circuit design. To establish a proper performance comparison, reported techniques are implemented in a transmission gate-based carry skip adder circuit @ 22-nm technology node. Results obtained demonstrate that the multi-threshold CMOS technique offers the best performance under the given conditions. Further, a novel modified hybrid circuit design technique is also proposed in this paper. To validate the proposed design technique, performance metrics of the carry-skip adder circuit implemented using the proposed hybrid technique and other low power circuit design techniques are compared. Obtained results establish that the proposed technique offers improvement in terms of propagation delay (TP), average power dissipation (PAVG), power delay product (PDP) and leakage power (LP), when compared with its counterpart at a supply voltage of 0.4 V. [ABSTRACT FROM AUTHOR]

The hazardous or toxic chemical releases have a detrimental impact on public safety. Estimating source parameters is of particular importance in aiding emergency response and post-assessment. Source term estimation from sensor measurements with a given Gaussian puff dispersion model is a typical inverse problem, which can be transformed into an optimization problem. In this paper, we employed the particle swarm optimization, the Nelder-Mead method, and their hybrid method to solve the optimization problem. Furthermore, we proposed a three-dimensional neighborhood topology which considerably improves performance of the particle swarm optimization. We implemented all these algorithms in JAVA on an embedded system to make a preliminary estimation of the accidental puff release. Numerical experiments with synthetic datasets show that the particle swarm optimization maintains a balance between computation time, accuracy, robustness, and implementation complexity. In contrast, the hybrid algorithm has an advantage in computation time at the expense of more sophisticated implementation. [ABSTRACT FROM AUTHOR]

Exploration and exploitation are two cornerstones for multi-objective evolutionary algorithms (MOEAs). To balance exploration and exploitation, we propose an efficient hybrid MOEA (i.e., MOHGD) by integrating multiple techniques and feedback mechanism. Multiple techniques include harmony search, genetic operator and differential evolution, which can improve the search diversity. Whereas hybrid selection mechanism contributes to the search efficiency by integrating the advantages of the static and adaptive selection scheme. Therefore, multiple techniques based on the hybrid selection strategy can effectively enhance the exploration ability of the MOHGD. Besides, we propose a feedback strategy to transfer some non-dominated solutions from the external archive to the parent population. This feedback strategy can strengthen convergence toward Pareto optimal solutions and improve the exploitation ability of the MOHGD. The proposed MOHGD has been evaluated on benchmarks against other state of the art MOEAs in terms of convergence, spread, coverage, and convergence speed. Computational results show that the proposed MOHGD is competitive or superior to other MOEAs considered in this paper. [ABSTRACT FROM AUTHOR]

Printed electronics based on nanomaterials has been a potential alternative to conventional electronic technology and is favorable for flexible polymer substrates. However, a printed circuit has insufficient electrical performance and mechanical reliability under flexible stress. We designed hybrid Ag pastes containing Ag nanoparticles (NPs, 30–50 nm) and Ag flake (F, 2.5–3.5 μm in diameter) particles to overcome the obstacles of printed electronics. Six types of Ag paste (Ag NPs-x wt% F paste, x = 0, 10, 25, 50, 75, and 100) were screen-printed onto a polyimide substrate and sintered at 200 °C for fabricating a flexible circuit. We simulated a coplanar waveguide pattern before measuring the S-parameter using high frequency structural simulation. To investigate the radio frequency characteristics of various Ag circuits under sliding stress, a network analyzer and Cascade’s probe system in the frequency range from 1 to 10 GHz were employed before and after 100,000 sliding cycles. Hybrid Ag circuits showed stable electrical conductance and signal transmission, while pure Ag particle circuits showed a definite drop of electrical conductance (over 30% increase of electrical resistance) under cyclic sliding stress. The microstructural crack behavior demonstrated that the Ag F content within the Ag hybrid circuits effectively suppressed crack propagation, leading to improved flexibility of the sintered Ag circuit. [ABSTRACT FROM AUTHOR]

A broadly used computational framework posits that two learning systems operate in parallel during the learning of choice preferences-namely, the model- free and model- based reinforcement-learning systems. In this study, we examined another possibility, through which model-free learning is the basic system and model-based information is its modulator. Accordingly, we proposed several modified versions of a temporal-difference learning model to explain the choice-learning process. Using the two-stage decision task developed by Daw, Gershman, Seymour, Dayan, and Dolan (2011), we compared their original computational model, which assumes a parallel learning process, and our proposed models, which assume a sequential learning process. Choice data from 23 participants showed a better fit with the proposed models. More specifically, the proposed eligibility adjustment model, which assumes that the environmental model can weight the degree of the eligibility trace, can explain choices better under both model-free and model-based controls and has a simpler computational algorithm than the original model. In addition, the forgetting learning model and its variation, which assume changes in the values of unchosen actions, substantially improved the fits to the data. Overall, we show that a hybrid computational model best fits the data. The parameters used in this model succeed in capturing individual tendencies with respect to both model use in learning and exploration behavior. This computational model provides novel insights into learning with interacting model-free and model-based components. [ABSTRACT FROM AUTHOR]

A hybrid technique, which is a combination of the Fast Fourier Transform (FFT) and Sliding Window (SW) technique, is proposed for the development of new structure for Discrete Multiwavelet Critical-Sampling Transform based Orthogonal Frequency Division Multiplexing (DMWCST-OFDM) system under multipath fading channels with the Doppler frequency effect. FFT is utilized to increase the orthogonality of subcarriers against the multipath frequency-selective fading channels. SW technique reduces the fluctuation of signal amplitude, thereby reducing the Doppler frequency effect. This hybrid technique offers a good tradeoff between performance and complexity, where this technique needs more computations. However, it performs better than the standard DMWCST-OFDM system. The performance of the proposed system, called SW-DMWCST-OFDM, was compared to that of the standard DMWCST-OFDM, SW-FFT-OFDM, and FFT-OFDM systems under three channels, namely, additive white Gaussian noise, flat fading, and frequency-selective fading. The simulation results show that the proposed model performs better than the three other models in all types of channels. [ABSTRACT FROM AUTHOR]

Previous studies have mostly considered the competing risks to be independent even when the interpretation of the failure modes implies dependency. This paper studies the dependent competing risks model from Gompertz distribution under Type-I progressively hybrid censoring scheme. We derive the maximum likelihood estimations of the model parameters, and then the asymptotic likelihood theory and Bootstrap method are used to obtain the confidence intervals. The simulation results are provided to investigate the effects of different dependence structures on the estimations of parameters. Finally, one data set was used for illustrative purpose. [ABSTRACT FROM AUTHOR]

Memristive devices are promising building blocks for enhanced CMOS hardware in data storage and computing. Nanoimprint lithography (NIL) has been an enabling technology in the past decade for exploring novel devices and circuits. In this paper, the authors review the progress and technical aspects of the fabrication and integration of memristor crossbar arrays using NIL. Since the key component of successful fabrication is the imprint mold, the material selection, master mold fabrication, anti-sticking treatment and cleaning are first discussed. The requirements and composition of imprint resists, in particular low-viscosity liquid resists that cross-link upon ultraviolet light radiation, are investigated next. After the description of imprint systems and alignment mechanisms, a disruptive self-alignment fabrication scheme for crossbar arrays is presented. Finally, the first implementation of a memristor/CMOS hybrid circuit using NIL on foundry-made CMOS substrates, together with more recent developments, is recounted. The challenges and possible solutions for NIL as a primary tool for crossbar fabrication are also proposed and discussed. [ABSTRACT FROM AUTHOR]

We introduce a III-V nanowire waveguide structure on a silicon substrate through III-V to silicon adhesive bonding technology. The proposed waveguide structure provides an omni-directional high-refractive-index contrast which is similar to the conventional silicon-on-insulator nanowire waveguides. The optical confinement factor in the active region of the proposed structure nearly doubles that in the conventional hybrid III-V waveguides with a thick p-InP top cladding layer. Electrical injection is also favored in the proposed structure using two thin lateral contact layers which can be fabricated through a double side patterning process. Passive waveguides are fabricated and measured. Propagation losses of 16.18 and 17.83 dB/mm are extracted for the fundamental transverse-electrical and transverse-magnetic modes, respectively, in the proposed III-V nanowire waveguide of 600 nm width. [ABSTRACT FROM AUTHOR]

This paper presents simulation methodology that combines a local nonmatching grid with a discrete fracture model. Designed for 2D and 3D multiphase flow simulations in standard simulators, the method handles matrix-matrix, fracture-fracture, and matrix-fracture connections in the context of an unstructured, local nonmatching grid. The grid is generated at the fracture intersections, enabling accurate modeling of small control volumes between connecting fractures. Grids are obtained simply by redistributing the volume of small control volumes surrounding the small control volumes, making the method computationally efficient. A unified method to calculate the interblock transmissibility is used for both matching and nonmatching mesh. An unstructured finite-volume graph-based reservoir simulator with a two-point flux approximation reads the new grid by making a simple modification to the graph of connections between the control volumes. The method requires no special treatment of fracture-fracture or matrix-fracture transmissibility calculations and has the flexibility to simulate any flow problem efficiently. Several 2D and 3D numerical examples demonstrate the method's performance and accuracy. Both simple and complex fracture configurations are presented with various levels of geologic and fluid complexity. The numerical results are in good agreement with those of a reference solution obtained on a finely structured grid. [ABSTRACT FROM AUTHOR]

As multi-core systems transition to the many-core realm, the pressure on the interconnection network is substantially elevated. The Network-on-Chip (NoC) is expected to undertake the expanding demands of the ever-increasing numbers of processing elements, while-at the same time-technological and application constraints increase the pressure for increased performance and efficiency with limited resources. Although NoC research has evolved significantly the last decade, essential questions remain un-answered and call for fresh research ideas and innovative solutions. In this paper, we summarize a selected set of NoC-related research challenges, with the hope to guide future development and trigger high-impact research progress. [ABSTRACT FROM AUTHOR]