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Frequency encoded reconfigurable logic gates OR and AND are designed using interferometric switch based on quantum dot semiconductor optical amplifier (QDSOA) and simulated using MATLAB for the first time as far as our knowledge goes. The amplitude modulation (AM) and quality factor ( Q fe ) are calculated using numerical simulations confirming practical feasibility of the logic gates. This paper also investigates the effect of amplified spontaneous emission (ASE) noise on AM, Q fe and signal-to-noise ratio (SNR) values. AM below 0.005 dB and Q fe more than 30 dB ensure error free operation of the logic gates. [ABSTRACT FROM AUTHOR]

The work describes design and simulations of a three input NAND gate using quantum dot semiconductor optical amplifiers for the first time as far as author's knowledge goes. Both cross gain modulation and cross phase modulations implement the NAND operation in a modified manner. Amplitude modulation, extinction ratio, relative eye opening, contrast ratio, etc. are optimized in terms of control power and their dependence on amplified spontaneous noise has been investigated for three different unsaturated gains of the QDSOA. These parameters show efficient performance for unsaturated gains 20 and 30 dB. REO value more than 99% and Q value more than 16 dB ensure practical feasibility of the logic gate proposed. [ABSTRACT FROM AUTHOR]

An on‐chip dual‐mode all‐optical multifunctional logic operation unit including four AND and two OR logic gates is proposed and experimentally demonstrated. It is realized using multiple intra‐mode four‐wave mixing (FWM) processes in a multimode silicon waveguide for 2 × 10 Gbit/s non‐return‐to‐zero on–off‐keying (NRZ‐OOK) mode‐division multiplexing signals. The AND logic operation is realized via the non‐degenerate FWM processes, and the OR logic operation is realized by overlapping the two degenerate FWM idlers in frequency domain via appropriately selecting the dual‐mode pump wavelength. The two OR and four AND logic sequences are verified with NRZ‐OOK sequences for both TE0 and TE1 modes. [ABSTRACT FROM AUTHOR]

In this paper, an all-optical XOR-AND gate operation has been proposed using one-dimensional periodic nonlinear material model. This structure consists of alternating layers of different nonlinear materials. In this design, we can obtain XOR and AND logical operation simultaneously at the reflected and transmitted port of the periodic structure. Numerical simulation has also been done using the finite-difference-time-domain (FDTD) method. The response time of this switching operation is picoseconds (ps) range order. We find low insertion loss (−3.01 dB), high contrast ratio (14.13 dB) and high extension ratio (10.93 dB) of this device. This design will be useful in future all-optical computing. [ABSTRACT FROM AUTHOR]

Tera hertz optical asymmetric demultiplexer (TOAD) using two semiconductor optical amplifiers and two control signals has been used to design an all optical parity checker and generator. The same circuit can generate and check both even and odd parity using a control input. The numerical simulation using Matlab 2007b is done for performance analysis of the proposed device in terms of output bit pattern, amplified spontaneous emission (ASE) noise, extinction ratio, contrast ratio, pseudo eye diagram, relative eye opening (98.9% for 20 dB gain and 96.21% for 10 dB gain) and their variation with input control pulse energy, amplified spontaneous emission noise factor for different unsaturated gain. The simulated value of E.R. = 81.39 dB, C.R. = 83.15 dB, REOP = 98.9% and Q value = 86.16 dB are found for this proposal. [ABSTRACT FROM AUTHOR]

Present communication deals with the design and analysis of all-optical NOR and NAND gates using Quantum dot Semiconductor Optical Amplifiers (QDSOA). The design uses no interferometer structure but cross gain modulation is utilized for operation. The structures are simple and simulations at a rate of 1 Tb/s are processed. For unsaturated gain 30 dB, the logic gates show high values of ER (29.82 dB, 16.93 dB), CR (29.6 dB, 21.33 dB), and Q (25.4 dB, 13.2 dB). This ensures practical feasibility and high quality of the proposed gates. [ABSTRACT FROM AUTHOR]

In the 5G era, more sensitive information will be transmitted on optical networks. Although modern cryptography could support different security mechanisms in different layers, the optical layer has not been paid enough attention but it is also vulnerable to attack by tapping or other methods. The optoelectronic firewall is one of the promising security strategies which can accelerate the operating speed within manageable costs by employing optical signal processing compared with current electronic firewalls. The most significant and challenging component of an optoelectronic firewall is pattern recognition. However, either the latest pattern recognition systems can only process the OOK or BPSK modulation format signals, or the coherent correlators supporting higher order modulation format require advanced components to deal with a higher number of symbols. In this paper, to address the pattern recognition challenges, we propose, analyze and simulate a pattern recognition system of QPSK signals integrated into all-optical high-speed optoelectronic firewalls used for optical layer security. The numerical simulation results first demonstrate the feasibility, and a baud rate of 100GBaud can be achieved. Next, a threshold-setting method is developed which also proves the ability to recognize arbitrary target patterns. Then some noise analysis results demonstrate that the pattern recognition of the I branch can be immune to the noise while the output power of EDFAs in the Q branch needs to be configured carefully. Finally, the matched result of a real Ethernet frame further reveals that our proposed system is promisingly applied in optoelectronic firewalls.

Nonlinear photonic crystal ring resonators are suitable mechanisms that can be used for designing optical logic gates and digital structures. In this paper, we designed two nonlinear resonant rings by adding doped glass rods inside the photonic crystal ring resonator. An optical half adder was designed using these nonlinear photonic crystal ring resonators. We used plane wave expansion and finite difference time domain methods to simulate our optical half adder. The simulations show that when one of the input ports is ON, the normalized optical power at the S is about 90 %. The time delay in this case is 7 ps. Also when both the input ports are ON, the normalized optical power at the C is about 155 %. The time delay in this case is 8 ps. [ABSTRACT FROM AUTHOR]

In this communication, we have introduced a new thought of designing all-optical binary and multivalued inverters using a single semiconductor optical amplifier (SOA) at a speed more than 300Gbps. The operation of this inverter is based on the nonlinear polarization rotation (NPR) effect in SOA. The quality factor (Q ~ 38.3 dB for binary, 46.6 dB for ternary and 41.5 dB for quaternary inverter), extinction ratio (ER ~ 43 dB for binary, 40 dB for ternary and 39 dB for quaternary inverter), contrast ratio (CR ~ 46.5 dB for binary, 46.5 dB for ternary and 45 dB for quaternary inverter), and relative eye penning (REO ~ 96% for binary inverter, 92% for ternary inverter, and 87% for quaternary inverter) have been calculated. The single-SOA inverter can solve the operational delay and noise-related problem of a design by reducing the hardware complexity. The circuit shows some useful values of Q factor (> 10 dB) and other performance-related matrices even in an ultra-high speed (100Gbps or more). [ABSTRACT FROM AUTHOR]

Feasibility of quantum dot semiconductor optical amplifier-based all-optical XNOR gate is theoretically simulated and demonstrated using Mach–Zehnder interferometer-based structure. Extinction ratio, contrast ratio, quality factors optimization suggests efficient performance of the gate. Optimized value of relative eye opening is 92.62%, and corresponding ER, CR and Q factor are 11.32 dB, 14.62 dB and 11.05 dB, respectively, which shows overall good performance of the gate. The effect of ASE noise is also investigated on the performance of the proposed gate which shows no significant effects. [ABSTRACT FROM AUTHOR]

Odd and even number detection is an important mathematical operation. Generally when any number is divisible by 2 then it is called an even number, otherwise, it is an odd number. Division by 2 can be easily obtained by putting a point before the least significant bit of any binary number. As an example a number (27)10 = (11011)2 when divided by 2 its result will be (1101.1)2 = (13.5)10. Hence when we find the fractional bit as logic-1 we can say that the number is odd, otherwise, it is even. This operation can be obtained by using a demultiplexer. Here we have developed an optical circuit that can divide any binary integer number by 2, apart from that its 1's complement can also be obtained from the circuit. Both of the results can be obtained simultaneously. Terahertz optical asymmetric demultiplexer based switch plays a very important role to design this n-bit circuit. Numerical simulations are done to find the performance of the circuit. [ABSTRACT FROM AUTHOR]

In this article, simple models of optical computing circuits ( 1 × 4 demultiplexer (DEMUX), 4 × 1 multiplexer (MUX), Boolean logic, and half-adder (HA)) are shown with mechanically controlled plane mirrors. Photographs of the proposed computational circuits are also shown. It is very useful for the school student to understand optical logic and Boolean algebra. It also shows that, computation can be possible with simple plane mirrors placed on the table. Here mirror movements are done with hand. The principle of operation of the circuits is based on reflection of light from plane mirrors. Optical devices which are used in this activity are all low-cost materials. [ABSTRACT FROM AUTHOR]

All-optical XOR gate based on quantum dot semiconductor optical amplifier is proposed and analyzed without using Mach–Zehnder interferometer (MZI) structure at a rate of 2 Tb/s. Low control power and high-speed logic gates with extinction ratio more than 15 dB, contrast ratio 20 dB and amplitude modulation 0.03 dB are described with pseudoeye diagrams. A high quality factor (Q ~ 68) is obtained which ensures negligible bit error rate (BER). Relative eye opening (REO) more than 97% is reported for 20 dB small signal gain. The effect of amplified spontaneous emission noise is also investigated. [ABSTRACT FROM AUTHOR]

In the F5G era, a promising all-optical processing technology named all-optical pattern recognition has attracted more and more attention. Its applications include not only all-optical header recognition or address recognition in OCDMA but also optoelectronic firewalls. The higher the recognition rate of pattern recognition, the higher the processing rate of both applications can reach. To meet the development features of eFFB in F5G, high-speed all-optical pattern recognition should be achieved. In this paper, a QPSK all-optical pattern recognition system with a data rate of up to 84Gbps is proposed, analyzed, and experimentally demonstrated by employing commercial independent optical components. The system first converts the I branch of the input QPSK signal to a positive and a negative IM signal by adding the coherent carrier from the orthogonal polarization. Then the converted IM signals are coupled into time delay lines and optical AND logic gates implemented by HNLFs to achieve the optical correlation operation. In the end, a high-level optical pulse indicating the pattern recognized result is output. Numerical simulation results reveal that the proposed system can recognize the target sequence from the I branch of the input sequence and the position of the output high-level pulse in the time window of the I branch of the input sequence is the position of the last symbol of the target sequence. The results of the experiment demonstrate that the proposed system can recognize a 4-symbol target sequence from the I branch of an 8-symbol 84Gbps QPSK input sequence, which proves the all-optical pattern recognition of QPSK signals. • An 84Gbps QPSK all-optical pattern recognition system is proposed and demonstrated. • The operating principle is analyzed by simplifying the Jones matrix and approximately solving the Coupled Amplitude Equations of Four-Wave Mixing. • The system can recognize the target pattern from the input QPSK signal and the position of the output high-level pulse coincides with the last symbol of the target sequence from the simulation results. • The experimental results demonstrate that the system can recognize a 4-symbol target pattern from an 8-symbol input sequence of the I branch of the input 84Gbps QPSK signal. [ABSTRACT FROM AUTHOR]