Search

• Multi-component CFA can significantly improve the stability of foam. • High alkaline environment has a negative effect on foam stability. • AAS are suitable to prepare foamed concrete with high foam content. • AAS foamed concrete has better pore distribution than OPC foamed concrete. The multi-component composite foaming agent (CFA) with excellent properties was prepared by sodium α-alkenyl sulfonate (AOS), sodium dodecyl sulfate (K12), coconut oil (CO), and rosin liquid (RL), and three foam stabilizers, namely hydroxypropyl methylcellulose ether (HPMC), xanthan gum and sucrose. The foam stability and the foam stability in an alkaline environment and slurry were studied. The results show that the optimal composition of the multi-component CFA is 0.4% AOS, 0.1 % K12, 0.2% RL, 0.3% CO, 0.08% HPMC, 0.6% xanthan gum and 0.6% sucrose. When the CFA is used to prepare foam, the foaming multiple (FM) is 41, and the 1-hour settlement distance (SD) and the 1-hour bleeding ratio (BR) are zero. Moreover, the foam can maintain excellent stability within 2 h. Under an alkaline environment, when the pH is higher than 12.4, the foam stability will be adversely affected. The effective foam ratio (EFR) of foamed concrete increases first and then decreases with the increase of foam content. When foam content is less than 2.8 L/kg, the foam stability in ordinary Portland cement (OPC) paste is better than that of alkali-activated slag (AAS) paste. When the foam content is higher than 2.8 L/kg, the foam stability of the latter is better than the former. When foam content is 2.8 L/kg, the apparent density OPC and AAS system is 698 kg/m3 and 623 kg/m3, respectively. Compared with OPC foamed concrete, AAS foamed concrete presents more small pores, smaller average pore size and better roundness. [ABSTRACT FROM AUTHOR]

As a classical insulated gate bipolar transistor (IGBT) structure, the trench-gate field-stop (FS) IGBT has been widely used. For more convenient application, physics-based trench-gate FS IGBT models have received great attentions due to its effectiveness in simulating key device properties. However, current IGBT modeling studies for this popular IGBT chip seldom investigate the depletion layer behavior under the trench-gate structure. This article first derives the physics-based miller capacitance formula for the trench-gate structure according to finite element method (FEM) simulation. Another haunting issue for these physics-based IGBT models is that the intrinsic device parameters are difficult to be extracted appropriately. Thus, an FEM FS IGBT model is established in Sentaurus TCAD as the benchmark. Then, an improved parameter extraction procedure for a Fourier-series-based (FSB) IGBT model is proposed based on the improved miller capacitance formula. By the particle swarm optimization algorithm, key device parameters for the FSB IGBT model can be successfully extracted by fitting the simulated waveforms to those by FEM simulation at a randomly selected turn-off operating condition. Parameters extracted through the proposed procedure using the FSB IGBT model with the improved miller capacitance formula are very close to the device parameters of the FEM model. More importantly, the reliability and the robustness of the extracted parameters are further validated by comparing the waveforms of FSB model with those of FEM model at different operating conditions. [ABSTRACT FROM AUTHOR]

In a high-power semiconductor power module where multiple chips are populated in parallel, the thermal imbalance problem arises. In this article, the next-generation standard high-voltage insulated-gate bipolar transistor module for high-speed railcar traction is investigated to characterize the internal thermal imbalance among paralleling chips and evaluate the impact on temperature distribution in field application. The former is accomplished by a new test algorithm with a purposely designed module sample, while the latter is achieved via an advanced electro-thermal simulation from chip level to system level. The experimentally verified thermal network among paralleling chips reveals the multiple reasons for the thermal imbalance. A comparison between the simulation and experimental results regarding the paralleling chips’ power-cycling scenario helps to confirm the effectiveness of the chip model, the thermal network, and the electro-thermal simulation approach. A further electro-thermal simulation shows that the module internal thermal imbalance can lead to significant junction temperature discrepancy among paralleling chips in traction inverter applications, which should be taken into consideration for the long-term reliability assessment. [ABSTRACT FROM AUTHOR]

SiC MOSFETs have received great attention due to their excellent electrothermal properties. Accurate junction temperature information of SiC MOSFETs ensures safe operation and helps effective thermal management. However, the existing thermal models have limits to correctly predict the thermal behaviors, whose parameter extraction processes are normally complicated. Most of the thermal models generally omit the temperature effects, which greatly impairs their usefulness and effectiveness. Here, a temperature-dependent physical resistor–capacitor (RC) network model is proposed, which can accurately characterize the thermal behavior of SiC MOSFETs particularly under high-temperature conditions. Meanwhile, the boundary conditions are fully investigated and modeled, which guarantees the adaptation of the proposed model for different real-field applications. The proposed method can remarkably simplify the process of parameter extraction since only the steady-state temperature distribution information is required with the assistance of finite-element method (FEM). Finally, the effectiveness and the robustness of the proposed model are validated by FEM simulation and experiments. [ABSTRACT FROM AUTHOR]

A type of 3.3-kV/450-A half-bridge insulated-gate bipolar transistor power module combining the silicon (Si) and silicon carbide (SiC) technologies has been developed and reported in this article, for the miniaturization of the Chinese high-speed railway rolling stock traction inverters. This module is developed by integrating the next-generation industrial standard high-voltage packaging topology and the state-of-the-art 3.3 kV wide bandgap semiconductor chip technology, to reduce the waste power dissipation during operation, which in turn can lead to effective downsizing of key components in the traction inverter design. The module layout characteristics and the SiC Schottky barrier diodes design for substitution of the conventional Si fast recovery diodes will be described in detail. The mechanical, thermal, and electrical performances of the hybrid module are compared comprehensively with the Si-based counterpart. Based on the experimental results, an inverter system level evaluation of both modules is also conducted by electro-thermal simulation. The hybrid module shows advantages in loss reduction leading to great potential of system miniaturization, which is a cost effective solution for massive upgrading of the existing high-speed train traction inverters. [ABSTRACT FROM AUTHOR]

Solder interconnects are essential to the reliability of electronic devices. The addition of alloying elements was reported to provide beneficial effects to the microstructure and mechanical reliability of lead-free solder alloys. In this work, the effects of Sb addition on the mechanical behavior of SAC305 solder alloy were investigated. Based on differential thermal analysis, it was observed that melting point of SAC-Sb solder was slightly higher than that of SAC305. The mechanical behavior was studied at different temperatures (25 °C–125 °C) and strain rates (1 × 10−4 – 1 × 10−2 1/s) for SAC-Sb and SAC 305 solders as a comparison. From the results, ultimate tensile strength of SAC-Sb (10–72 MPa) was generally higher than that of SAC305 (4.54–61.5 MPa) at the aforementioned test conditions. A linear relation between the UTS and yield strength and temperature was identified for test results of SAC305, but the relation was found to be nonlinear for SAC-Sb solder because of solution strengthening effect of Sb in the Sn matrix. Parameters of Anand model were estimated based on mechanical behavior of SAC-Sb and SAC305 solders. Next, the model was used to evaluate thermal fatigue life of an insulated gate bipolar transistor (IGBT) module with SAC-Sb and SAC305 as chip-to-directed bonding copper (DBC) and DBC-to-baseplate attachment materials by finite element modeling. The increase of maximum inelastic strain in one thermal cycle in SAC-Sb solder joints was lower than that in SAC305 solder joints. This result indicates that SAC-Sb solder can provide a considerably better fatigue life under harsh service conditions. [ABSTRACT FROM AUTHOR]

The Fourier-series-based insulated-gate bipolar transistor (IGBT) model has been very effective in simulating its switching behaviors and meanwhile, reflecting carrier dynamics. However, in turn-on process, such a model has difficulty in distinguishing the boundary between undepleted area and depletion layer of the drift region due to Gibbs phenomenon and therefore, cannot accurately describe the carrier behavior of carrier storage region (CSR). In this study, the Fourier-series-based model is modified to determine the more precise depletion layer edge for turn on. This is achieved by utilizing the actual characteristics of the carrier concentration gradient at the edge of CSR in turn-on process. Such a modified model is implemented in MATLAB/Simulink and it can better reflect the depletion layer and simulate the distribution of both the carrier concentration and electric field during turn-on process. It corrects the unreasonable voltage tail caused by the error of drift region voltage calculation in previous models. The results of the proposed model under both the resistive load and inductive load are in good agreement with TCAD. Such a modified model can more accurately simulate both carrier dynamics and switching behaviors in the turn-on process. [ABSTRACT FROM AUTHOR]

Alkali-Activated Slag Cement (AASC) activated by weak alkaline components has good workability and safety. Sodium carbonate (Na 2 CO 3 , SC), sodium sulfate (Na 2 SO 4 , SS), reactive magnesium oxide (R-MgO), and calcium hydroxide (Ca(OH) 2 , CH) were used to prepare the AASC. The hydration process, phase composition and hydration kinetics of AASC were studied. The results showed that the pH value of AASC slurry activated by weak alkaline components ranging from 10.8 to 13.2. CH could significantly affect the pH of AASC slurry. When the dosage reached more than 5%, the pH value of AASC slurry reached more than 12.0. The hydration heat release of AASC activated by weak alkaline components was mainly concentrated in 1 day. Two hydration heat release peaks appeared. The initial hydration peak appeared within 0.5 h-1 h, and the acceleration hydration peak appeared within 1 h-8 h. When the content of CH was 5%, and the content of SS and SC was 7% and 4%, the acceleration peak of AASC was much higher than that of others. At the same time, the Krstulovic-Dabic model was used to study the hydration kinetics of AASC. The increase of SS content prolonged the NG-I and I-D processes. CH accelerated the hydration rate of AASC and shortened the hydration process of AASC. The main hydration products of AASC activated by weakly alkaline components were C-(A)-S-H gel, calcite, ettringite, hydrotalcite and gaylussite. R-MgO was favorable for the formation of hydrotalcite, while SS was favorable for the formation of ettringite. • Weakly alkaline salt can make Alkali-Activated Slag Cement (AASC) have a good alkaline environment. • The nucleation and crystal growth (NG)- phase boundary reaction (I) - diffusion (D) process of AASC is affected by weak alkaline salt. • There are more crystals in hydration products. [ABSTRACT FROM AUTHOR]

With the increase in the power density of power semiconductor chips, the lateral temperature gradient over the chip surface becomes more pronounced. Temperature gradients play an important role in reliability evaluation of IGBTs and have attracted great attentions. In this paper, the influence of IGBT chip temperature gradients on the crack initiation site and propagation path of the solder layer is investigated by finite-element analysis (FEA). Results indicated that the temperature gradient could influence the mechanism of solder layer fatigue. With the temperature gradient increasing, the crack initiation site shifts from the edge of solder layer to the center. The crack propagation path also changed. The fatigue mechanism of the solder layer under high temperature gradients is investigated by FEA. The inelastic strain energy density per cycle (ΔW) is found to be unequal at crack initiation and crack propagation stages. Accordingly, a novel energy-based lifetime prediction model based on Darveaux's model for solder layer fatigue of IGBTs is proposed, which takes into account the variation of ΔW within these two stages and can better characterize the processes of crack initiation and propagation in the solder layer. Subsequently, two lifetimes of IGBT modules under accelerated aging tests from the existing publications are used to verify the effectiveness of the proposed model. Finally, the accelerated aging tests were carried out to support the theoretical analysis on the direction of crack propagation under high temperature gradients. • The influence of temperature gradient on crack initiation site and propagation path is investigated by FEA • The fatigue mechanism under high temperature gradients is investigated by adding solder layer cracks with different lengths • An energy-based lifetime prediction model for solder layers of IGBT modules under high temperature gradients is proposed • ΔW is inequality in crack initiation and propagation stage [ABSTRACT FROM AUTHOR]

Reliability of bond wires in power modules has been a main subject of interest in both industry and academia. Until now, analytical modeling of thermo-mechanical stress mainly focuses on the loop height variation of bond wires instead of plastic strain, which is the key factor causing the fatigue failure. In this paper, an analytical model for analyzing plastic strain of bond wires in IGBT modules is proposed. Using a laser displacement sensor, the dynamic loop height variations of bond wires under different heating currents are experimentally measured, based on which the finite element analysis (FEA) simulation is calibrated and verified to reveal the actual thermo-mechanical stress. In this way, the usefulness of our proposed method is verified by comparing its simulation results with those from the multi-physics fields FEA method. Finally, the relationship between the bonding angle and the plastic strain at the heel of bond wires is established. This study would provide new perspectives into further research on thermo-mechanical fatigue analysis and optimal design of bond wires in power modules. • An analytical model for analyzing plastic strain of bond wires in IGBT modules is proposed. • The FEA simulation is calibrated based on the experimental results of loop top displacement. • The relationship between the bonding angle and the plastic strain at the heel of bond wires is established. • The models have been compared with FEA simulation results with good agreements. [ABSTRACT FROM AUTHOR]

Physical lifetime prediction methods based on inelastic strain energy density (energy-based lifetime prediction) have been proven to be effective in producing reliable results on small solder joints (ball-grid arrays or chip-scale package) due to their capabilities to represent physical characteristics of soldering materials and loading history. However, in the existing energy-based lifetime models for solder layer failure the inelastic strain energy density is usually assumed to unchanged during aging, which is untrue particularly for large-area solder joints when crack propagation is considered. In this paper, an energy-based lifetime prediction method is proposed for failure of IGBT modules by explicit emulation of solder layer degradation. Inelastic strain energy density variances with respect to aging are meticulously modeled. The large-area solder layer is evenly divided into meshed elements, birth and death technique in finite element analysis (FEA) is used to successively emulate crack propagation. In this way, the increment of thermal resistance due to the solder layer degradation can be predicted. The lifetime prediction results by our proposed method show nice agreement with the experiment under different aging conditions. • An energy-based lifetime prediction method is proposed for failure of IGBT modules • Birth and death technique in FEA is used to successively emulate crack propagation • The increment of thermal resistance due to the solder layer degradation can be predicted • ΔW will change with different aging stage [ABSTRACT FROM AUTHOR]