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101 results on '"Li, Helong"'

15. Short Circuit Protection of Silicon Carbide MOSFETs: Challenges, Methods, and Prospects

Author

Zhang, Man, Li, Helong, Yang, Zhiqing, Zhao, Shuang, Wang, Xiongfei, and Ding, Lijian

Abstract

With the fabulous growth of the renewable energy industry, silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (mosfets) are increasingly finding applications in various scenarios. To ensure the safe operation of SiC mosfets, there is a pressing need for fast and reliable short-circuit protection methods. This article aims to give a detail overview of the existing short-circuit protection technologies for SiC mosfets regarding their merits and limitations. First, the challenges associated with short-circuit protection are comprehensively analyzed. Subsequently, thorough comparisons of state-of-the-art short-circuit detection methods and soft turn-off strategies are conducted, respectively. Finally, this work outlines the prospects of short-circuit protection technologies in the aspects of deficiencies and optimization of short-circuit protection in multichip power module with paralleled SiC mosfets.

Published
2024
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31. Analysis of SiC MOSFETs Short-Circuit behavior in Half Bridge Configuration during Shoot-Through Event

Author

Zhang, Man, Li, Helong, Yang, Zhiqing, Zhao, Shuang, Wang, Xiongfei, Ding, Lijian, Zhang, Man, Li, Helong, Yang, Zhiqing, Zhao, Shuang, Wang, Xiongfei, and Ding, Lijian

Abstract

This paper investigates the short-circuit behavior of SiC MOSFETs in half bridge configuration during shoot-through event. The short-circuit peak current (ISCP) as well as the distribution of drain to source voltage (VDS) of half bridge configuration are analyzed under various mismatch operating condition. Further, the determinants on total amount and distribution of short-circuit energy (SC energy) are obtained. It is revealed that the device with the lowest short-circuit current carrying capacity determines the ISCP and the total SC energy of half bridge leg. Besides, the decrease of active switch common source inductance can mitigate the VDS and SC energy imbalance caused by load current. The conclusions are validated by experimental results., Part of ISBN 9798350316445QC 20240201

Published
2023
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32. Layout Design Principle for Optimization of Transient Current Distribution among Paralleled SiC MOSFETs in Multichip Modules

Author

Zhang, Man, Li, Helong, Yang, Zhiqing, Zhao, Shuang, Wang, Xiongfei, Ding, Lijian, Zhang, Man, Li, Helong, Yang, Zhiqing, Zhao, Shuang, Wang, Xiongfei, and Ding, Lijian

Abstract

This paper gives a layout design principle for multichip SiC MOSFET power modules taking the transient current distribution among paralleled dies into consideration. A few typical power module layouts are analyzed and modeled with parasitic layout parameters. With the analysis and comparison, a universal and practical design principle is proposed, which is to make the direction of parallel connections perpendicular to the direction of current flow. Applying this design principle mitigates the di/dt through the parasitic inductance between the source terminals of the paralleled dies. Furthermore, this approach avoids current coupling effects, which aggravate transient current imbalances. The design principle is verified with experimental results., Part of ISBN 9789075815412QC 20231116

Published
2023
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33. Parallel Connection of Silicon Carbide MOSFETs - Challenges, Mechanism, and Solutions

Author

Li, Helong, Zhao, Shuang, Wang, Xiongfei, Ding, Lijian, Mantooth, Homer Alan, Li, Helong, Zhao, Shuang, Wang, Xiongfei, Ding, Lijian, and Mantooth, Homer Alan

Abstract

Power semiconductor devices are often connected in parallel to increase the current rating of the power conversion systems. However, due to mismatched circuit parameters or semiconductor fabrication discrepancies, the current of paralleled power semiconductor devices can be unbalanced, which potentially leads to accelerated aging and long-term reliability issues. The fast-switching speed of silicon carbide (SiC) devices aggravates this problem due to its higher sensitivity to parasitic parameters. Numerous efforts have been dedicated to analyzing and addressing the current imbalance issue of paralleling SiC devices. This article comprehensively summarizes and presents state-of-the-art research regarding the current imbalance in paralleled SiC devices. Degree of imbalance is proposed to comprehensively quantify the current mismatch. Starting with mechanism analysis, different types of current imbalance are categorized. Various device parameters and the package layout that impact the current distribution are investigated. The existing solutions including passive methods and active methods are concluded and categorized. This work also incorporates insight into the future development needs of high-power multichip SiC module packaging and driving technologies., QC 20230725

Published
2023
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45. Comprehensive Analysis of Paralleled SiC MOSFETs Current Imbalance Under Asynchronous Gate Signals

Author

Wang, Jianing, Wang, Chen, Zhao, Shuang, Li, Helong, Ding, Lijian, Shen, Xun, and Mantooth, H. Alan

Abstract

Parallel-connected power device is an extensively applied solution in the industry to increase the current rating of the converter system. However, due to the undesired printed circuit board (PCB) layout or semiconductor fabrication tolerance, mismatched drain–source current, which speeds up the aging process of a certain device, can be introduced. The application of silicon carbide (SiC) devices aggravates this problem due to their higher switching speed. Asynchronous gate signal lag brought by the different driver chip propagation delay, gate loop parasitic inductance, or asynchronous pulse width modulation (PWM) signal is a major reason for transient current imbalance. The analysis of its impact on switching behavior is yet to be clarified. Specifically, the analytical trajectory model of parallel-connected devices has not been thoroughly studied. In this article, different types of current imbalance of parallel-connected SiC MOSFETs are analyzed. Via deriving the trajectory model of parallel-connected SiC MOSFETs in different conditions, the physical mechanism of device paralleling is revealed. The quantitative relationship among semiconductor electrical parameter and important performance indicators, such as switching energy loss and current stress, can be derived. It can provide a theoretical basis for the current sharing strategy and device long-term reliability enhancement. The experimental study is conducted to validate the proposed analytical model.

Published
2023
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