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Accurate control of doping and fabrication of metal contacts on n-type germanium nanowires (GeNWs) with low resistance and linear characteristics remain a major challenge in germanium-based nanoelectronics. Here, we present a combined approach to fabricate Ohmic contacts on n-type-doped GeNWs. Phosphorus (P) implantation followed by millisecond rear-side flash lamp annealing was used to produce highly n-type-doped Ge with an electron concentration in the order of 10^19-10^20 cm^{-3}. Electron beam lithography, inductively coupled plasma reactive ion etching, and nickel (Ni) deposition were used to fabricate GeNW-based devices with symmetric Hall bar configuration, which allows detailed electrical characterization of the NWs. Afterward, rear-side flash lamp annealing was applied to form Ni germanide at the Ni-GeNWs contacts to reduce the Schottky barrier height. The two-probe current-voltage measurements on P-doped GeNWs exhibit linear Ohmic behavior. Also, the size-dependent electrical measurements showed that carrier scattering near the NW surfaces and reduction of the effective NW cross-section dominate the charge transport in the GeNWs.

The electronic band alignment of an alumina/zinc oxide thin-film heterostructure solely grown by atomic layer deposition has been determined by XPS/UPS depth profiling, correlating the electronic properties with the interface chemical composition.

Abstract The continued downscaling of silicon CMOS technology presents challenges for achieving the required low power consumption. While high mobility channel materials hold promise for improved device performance at low power levels, a material system which enables both high mobility n-FETs and p-FETs, that is compatible with Si technology and can be readily integrated into existing fabrication lines is required. Here, we present high performance, vertical nanowire gate-all-around FETs based on the GeSn-material system grown on Si. While the p-FET transconductance is increased to 850 µS/µm by exploiting the small band gap of GeSn as source yielding high injection velocities, the mobility in n-FETs is increased 2.5-fold compared to a Ge reference device, by using GeSn as channel material. The potential of the material system for a future beyond Si CMOS logic and quantum computing applications is demonstrated via a GeSn inverter and steep switching at cryogenic temperatures, respectively.