25 results on '"Alagarsamy, Aravindhan"'
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2. Outlier detection in additive manufacturing using novel machine learning algorithm
3. Probability-based mapping approach for an application-aware networks-on-chip architectures
4. Design and implementation of hybrid (radix-8 Booth and TRAM) approximate multiplier using 15-4 approximate compressors for image processing application
5. Deep learning-based sustainable subsurface anomaly detection in Barker-coded thermal wave imaging
6. An Area-Efficient Unique 4:1 Multiplexer Using Nano-electronic-Based Architecture
7. SaHNoC: an optimal energy efficient hybrid networks-on-chip architecture
8. Traffic monitoring in smart cities using internet of things assisted robotics
9. Design and analysis of text document clustering using salp swarm algorithm
10. FRDS: An efficient unique on-Chip interconnection network architecture
11. SMA: A constructive partitioning based mapping approach for Networks-on-Chip
12. Reliable Synchronous and Asynchronous Counter Design in QCA.
13. Antibacterial Performance of Biodegradable Polymer and Hazelnut Husk Flour Antibacterial Biofilm with Silver Nanoparticles.
14. 18 - Economical aspects of agro-industrial waste for bio-filler production
15. Adaptive FIR Filter Design with Approximate Adder and Hybridized Multiplier for Efficient Noise Eradication in Sensor Nodes
16. Verification of SoC Using Advanced Verification Methodology
17. Deep Learnıng-Based Sustaınable Subsurface Anomalıes Detectıon In Barker-Coded Thermal Wave Imagıng
18. Estimation of bit error rate in 2×2 and 4×4 multi-input multi-output-orthogonal frequency division multiplexing systems
19. List of contributors
20. SaHNoC: an optimal energy efficient hybrid networks-on-chip architecture
21. High Speed Approximate Carry Speculative Adder in Error Tolerance Applications
22. Verification of SoC Using Advanced Verification Methodology †.
23. A Case Study on Cluster Based Application Mapping Method for Power Optimization in 2D NoC
24. Multicriteria Deming Regressive African Buffalo Optimized Mapping for 3D NoC Architecture Design
25. Estimation of bit error rate in 2×2 and 4×4 multi-input multioutput-orthogonal frequency division multiplexing systems.
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