Search

In a high-power semiconductor power module where multiple chips are populated in parallel, the thermal imbalance problem arises. In this article, the next-generation standard high-voltage insulated-gate bipolar transistor module for high-speed railcar traction is investigated to characterize the internal thermal imbalance among paralleling chips and evaluate the impact on temperature distribution in field application. The former is accomplished by a new test algorithm with a purposely designed module sample, while the latter is achieved via an advanced electro-thermal simulation from chip level to system level. The experimentally verified thermal network among paralleling chips reveals the multiple reasons for the thermal imbalance. A comparison between the simulation and experimental results regarding the paralleling chips’ power-cycling scenario helps to confirm the effectiveness of the chip model, the thermal network, and the electro-thermal simulation approach. A further electro-thermal simulation shows that the module internal thermal imbalance can lead to significant junction temperature discrepancy among paralleling chips in traction inverter applications, which should be taken into consideration for the long-term reliability assessment. [ABSTRACT FROM AUTHOR]

A method to derive the junction-to-case level coupling thermal resistances among paralleling chips in the multichip semiconductor power module has been proposed in this article. It is revealed that the traditional structure function methodology (SFM), which is developed for analyzing the self-heating effect of the driving-point chip, cannot be applied directly in the thermal coupling analysis, where the influence of the driving-point chip on the neighboring acceptor chip is concerned. This article shows that by combining the traditional SFM with the frequency-domain analysis (FDA), the effective separation points between the module case and the external cooling setup can be identified in both time and frequency domains, which correspond to the characteristic frequency points in the complex loci of the thermal impedance curves. By extracting the amplitudes at the characteristic frequencies from the complex loci in the FDA, the junction-to-case level coupling thermal resistances can be derived. Both simulation and experimental study have been carried out to verify the concept. The agreement between the two justifies the proposed method. [ABSTRACT FROM AUTHOR]

With the rapid development of wide‐band gap semiconductor chip and package technologies, the voltage class of commercial silicon carbide (SiC) device is gradually improved. This paper concentrates on the latest 3.3‐kV full SiC‐based metal oxide semiconductor field‐effect transistor (MOSFET) device and its application in railway traction. First, compared with the Si‐based insulated‐gate bipolar transistor (IGBT), the SiC‐based MOSFET shows lower switching loss but weaker short‐circuit capacity. Second, in the railway traction application, the SiC‐based MOSFET with high switching frequency could reduce the inverter loss, the harmonic loss and the noise of traction motor. Third, a well‐designed filter is necessary between the inverter and the motor to prevent the motor from terminal overvoltage and insulation problem, which are resulted from long cable and high dv/dt. Finally, a full‐SiC railway traction inverter prototype is built and tested, and shows obvious advantages on miniaturization and lightweight. [ABSTRACT FROM AUTHOR]

A type of 3.3-kV/450-A half-bridge insulated-gate bipolar transistor power module combining the silicon (Si) and silicon carbide (SiC) technologies has been developed and reported in this article, for the miniaturization of the Chinese high-speed railway rolling stock traction inverters. This module is developed by integrating the next-generation industrial standard high-voltage packaging topology and the state-of-the-art 3.3 kV wide bandgap semiconductor chip technology, to reduce the waste power dissipation during operation, which in turn can lead to effective downsizing of key components in the traction inverter design. The module layout characteristics and the SiC Schottky barrier diodes design for substitution of the conventional Si fast recovery diodes will be described in detail. The mechanical, thermal, and electrical performances of the hybrid module are compared comprehensively with the Si-based counterpart. Based on the experimental results, an inverter system level evaluation of both modules is also conducted by electro-thermal simulation. The hybrid module shows advantages in loss reduction leading to great potential of system miniaturization, which is a cost effective solution for massive upgrading of the existing high-speed train traction inverters. [ABSTRACT FROM AUTHOR]

As a classical insulated gate bipolar transistor (IGBT) structure, the trench-gate field-stop (FS) IGBT has been widely used. For more convenient application, physics-based trench-gate FS IGBT models have received great attentions due to its effectiveness in simulating key device properties. However, current IGBT modeling studies for this popular IGBT chip seldom investigate the depletion layer behavior under the trench-gate structure. This article first derives the physics-based miller capacitance formula for the trench-gate structure according to finite element method (FEM) simulation. Another haunting issue for these physics-based IGBT models is that the intrinsic device parameters are difficult to be extracted appropriately. Thus, an FEM FS IGBT model is established in Sentaurus TCAD as the benchmark. Then, an improved parameter extraction procedure for a Fourier-series-based (FSB) IGBT model is proposed based on the improved miller capacitance formula. By the particle swarm optimization algorithm, key device parameters for the FSB IGBT model can be successfully extracted by fitting the simulated waveforms to those by FEM simulation at a randomly selected turn-off operating condition. Parameters extracted through the proposed procedure using the FSB IGBT model with the improved miller capacitance formula are very close to the device parameters of the FEM model. More importantly, the reliability and the robustness of the extracted parameters are further validated by comparing the waveforms of FSB model with those of FEM model at different operating conditions. [ABSTRACT FROM AUTHOR]