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Your search keyword '"V. R. González"' showing total 3 results
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3 results on '"V. R. González"'

1. Post-harvest quality of melon accessions subjected to salinity

Author

F. H. A. Silva, P. L. D. Morais, M. A. S. Morais, V. R. Gonzalez, and N. S Dias

Subjects
Cucumis melo L., genotypes, osmoregulators, antioxidante, Science, Biology (General), QH301-705.5, Zoology, QL1-991, Botany, QK1-989
Abstract

Abstract The objective was to evaluate the behavior of melon genotypes (Cucumis melo L.) in the physical, chemical and biochemical quality of melon fruits as a function of electrical conductivity irrigation water levels (ECw). The experimental design adopted was randomized blocks in a 5 x 3 factorial scheme with five replications. The first factor was represented by five salinity levels (0.5, 1.5, 3.0, 4.5, and 6.0 dS m-1) and the second factor by accessions A35, and A24, and the hybrid Sancho. The physical, chemical and biochemical variables showed a reduction in production, with smaller fruits, with less weight, smaller cavity, with increased pulp thickness for Sancho. Vitamin C and yellow flavonoids increased indicating antioxidant power against ROS. The genotypes showed similar post-harvest behavior, however, the hybrid Sancho stood out over the others, possibly because it is an improved material. Accession A24 presented physiological and biochemical responses that classify it as intolerant.

Published
2024
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2. Behavioral Modeling of Chaos-Based Applications by Using Verilog-A

Author

V. R. González Díaz, S. Romero-Camacho, L. Delgado-Toral, A. Luis-Ramos, Esteban Tlelo-Cuautle, P. Zaca-Morán, J. A. Cocoma-Ortega, J. Mateo-Juárez, L. C. Gómez-Pavón, Jesús M. Muñoz-Pacheco, and F. Sánchez-Guzmán

Subjects
Computer science, Hardware description language, Chaotic, Verilog, Control engineering, Logistic map, Communications system, computer, Behavioral modeling, Abstraction (linguistics), computer.programming_language, Electronic circuit
Abstract

In general, a system can be defined as a collection of interconnected components that transforms a set of inputs received from its environment to a set of outputs. From an engineering point of view, chaos-based applications can be classified as a electronic system where the vast majority of the internal signals used as interconnections are electrical signals. Inputs and outputs are also provided as electrical quantities, or converted from, or to, such signals using sensors or actuators. To gain insight about the overall performance of the particular chaos-based application, the whole system must be characterized and simulated simultaneously. That is not a trivial task because the complexity of each one of the blocks that comprises the system, as well as the intrinsic complex behavior of chaotic generators. In this chapter, a modeling strategy suited to represent chaos-based applications for different control parameters of chaotic systems is presented. Based on behavioral descriptions obtained from a Hardware Description Language (HDL), called Verilog-A, two applications of chaotic systems are analyzed and designed. More specifically, a chaotic sinusoidal pulse width modulator (SPWM) which is useful to develop control algorithms for motor drivers in electric vehicles, and a chaotic pulse position modulator (CPPM) widely used in communication systems are presented as cases under analysis. Those applications are coded in Verilog-A and by using different abstraction levels, the indications of the degree of detail specified on how the function is to be implemented are obtained. Therefore, these behavioral models try to capture as much circuit functionality as possible with far less implementation details than the device-level description of the electronic circuit. Several circuit simulations applying H-Spice simulator are presented to demonstrate the usefulness of the proposed models. In this manner, behavioral modeling can be a possible solution for the successful development of robust chaos-based applications due to various types of systems that can be represented and simulated by means of an abstract model.

Published
2017

3. A Verilog-A Based Fractional Frequency Synthesizer Model for Fast and Accurate Noise Assessment

Author

V. R. Gonzalez-Diaz, J. M. Munoz-Pacheco, G. Espinosa-Flores-Verdad, and L. A. Sanchez-Gaspariano

Subjects
Frequency Synthesizers, Fractional, Modeling, Sigma-Delta, Phase Noise, Verilog-A, Electrical engineering. Electronics. Nuclear engineering, TK1-9971
Abstract

This paper presents a new strategy to simulate fractional frequency synthesizer behavioral models with better performance and reduced simulation time. The models are described in Verilog-A with accurate phase noise predictions and they are based on a time jitter to power spectral density transformation of the principal noise sources in a synthesizer. The results of a fractional frequency synthesizer simulation is compared with state of the art Verilog-A descriptions showing a reduction of nearly 20 times. In addition, experimental results of a fractional frequency synthesizer are compared to the simulation results to validate the proposed model.

Published
2016

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