Author: "Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) / Publication Year Range: Last 10 years - Searchworks@Jio Institute Digital Library Search Results

Your search keyword '"Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) ' showing total 577 results

Start Over Author "Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) Publication Year Range Last 10 years

577 results on '"Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) '

1. Integrated Waveguides in Nanoporous Alumina Membrane for Millimeter-Wave Interposer

Author: Ariana L. C. Serrano, Julio M. Pinheiro, Darine Kaddour, Rogerio C. A. Alvarenga, Philippe Ferrari, Noureddine Kabbani, Matthieu Bertrand, Emmanuel Pistono, Leonardo G. Gomes, Vincent Puyal, Gustavo P. Rehder, Laboratory of Microelectronics USP, Universidade de São Paulo (USP), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Université Grenoble Alpes (UGA), Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI), Université Grenoble Alpes (UGA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Universidade de São Paulo ( USP ), Laboratoire de Conception et d'Intégration des Systèmes ( LCIS ), Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Université Grenoble Alpes ( UGA ), Équipe MIcro et Nanosystèmes pour les Communications sans fil ( LAAS-MINC ), Laboratoire d'analyse et d'architecture des systèmes [Toulouse] ( LAAS ), Centre National de la Recherche Scientifique ( CNRS ) -Université Toulouse III - Paul Sabatier ( UPS ), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Institut National des Sciences Appliquées - Toulouse ( INSA Toulouse ), Institut National des Sciences Appliquées ( INSA ) -Institut National des Sciences Appliquées ( INSA ) -Institut National Polytechnique [Toulouse] ( INP ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Toulouse III - Paul Sabatier ( UPS ), Institut National des Sciences Appliquées ( INSA ) -Institut National des Sciences Appliquées ( INSA ) -Institut National Polytechnique [Toulouse] ( INP ), Techniques of Informatics and Microelectronics for integrated systems Architecture ( TIMA ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), and Universidade de São Paulo = University of São Paulo (USP)
Subjects: Materials science, Nanoporous, business.industry, Coplanar waveguide, Nanowire, 020206 networking & telecommunications, 02 engineering and technology, Condensed Matter Physics, [ SPI.TRON ] Engineering Sciences [physics]/Electronics, law.invention, [SPI.TRON]Engineering Sciences [physics]/Electronics, law, Attenuation coefficient, Extremely high frequency, 0202 electrical engineering, electronic engineering, information engineering, Interposer, Optoelectronics, Electrical and Electronic Engineering, Photolithography, business, Waveguide, ComputingMilieux_MISCELLANEOUS
Abstract: The integration of rectangular waveguides inside a nanoporous alumina membrane is proposed in this letter. The horizontal copper plates are realized by a photolithography process while the vertical connections are made of copper nanowires selectively grown inside the nanopores. The lateral wall position can, therefore, be freely adjusted. Waveguides in the $V$ -band (50–75 GHz) and the $W$ -band (75–110 GHz) were manufactured in a 50- $\mu \text{m}$ -thick membrane. For the measurement purpose, wideband transitions from a grounded coplanar waveguide to the waveguide were designed. The measured performance validates the propagation of guided waves with an attenuation constant of about 0.5–0.8 dB/mm in the operating bands, opening the way for the design of functionalized millimeter-wave alumina interposers.
Published: 2019
Full Text: View/download PDF

2. Substrate Integrated Waveguides for mm-wave Functionalized Silicon Interposer

Author: Matthias Wietstruck, Darine Kaddour, Giuseppe Acri, Florence Podevin, Selin Tolunay Wipf, Matthieu Bertrand, Vincent Puyal, Philippe Ferrari, Mehmet Kaynak, C. Wipf, Emmanuel Pistone, Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire de Conception et d'Intégration des Systèmes (LCIS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), IHP Frankfurt, Innovations for High Performance Microelectronics (IHP), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Centre National de la Recherche Scientifique (CNRS)-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Institut National Polytechnique de Grenoble (INPG)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Université Grenoble Alpes (UGA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Université Grenoble Alpes (UGA), Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI), Université Grenoble Alpes (UGA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation ( IMEP-LAHC ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Université Savoie Mont Blanc ( USMB [Université de Savoie] [Université de Chambéry] ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), Laboratoire de Conception et d'Intégration des Systèmes ( LCIS ), Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Université Grenoble Alpes ( UGA ), Équipe MIcro et Nanosystèmes pour les Communications sans fil ( LAAS-MINC ), Laboratoire d'analyse et d'architecture des systèmes [Toulouse] ( LAAS ), Centre National de la Recherche Scientifique ( CNRS ) -Université Toulouse III - Paul Sabatier ( UPS ), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Institut National des Sciences Appliquées - Toulouse ( INSA Toulouse ), Institut National des Sciences Appliquées ( INSA ) -Institut National des Sciences Appliquées ( INSA ) -Institut National Polytechnique [Toulouse] ( INP ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Toulouse III - Paul Sabatier ( UPS ), Institut National des Sciences Appliquées ( INSA ) -Institut National des Sciences Appliquées ( INSA ) -Institut National Polytechnique [Toulouse] ( INP ), Innovations for High Performance Microelectronics ( IHP ), Techniques of Informatics and Microelectronics for integrated systems Architecture ( TIMA ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), and IHP - Leibniz-Institut für innovative Mikroelektronik
Subjects: 010302 applied physics, Materials science, business.industry, 020206 networking & telecommunications, Topology (electrical circuits), 02 engineering and technology, Substrate (electronics), 01 natural sciences, [ SPI.TRON ] Engineering Sciences [physics]/Electronics, law.invention, [SPI.TRON]Engineering Sciences [physics]/Electronics, CMOS, law, 0103 physical sciences, Shielded cable, 0202 electrical engineering, electronic engineering, information engineering, Interposer, Optoelectronics, business, Realization (systems), Waveguide, ComputingMilieux_MISCELLANEOUS, Electronic circuit
Abstract: This paper presents D-band mm-wave SIWs, which are embedded in a high-resistivity silicon interposer. Thanks to the interposer thickness equal to $\pmb{70\ \mu} \mathbf{m}$ , high-performance SIW were obtained, with measured attenuation constant between 0.4 and 0.6 dB/mm from 110 GHz to 170 GHz. These first results pave the way for the realization of high performance passive circuits and antennas embedded in the interposer. Also, by using a fully shielded waveguide highly insensitive to adj acent wave-guiding and radiating structures, this topology provides significant advantages for packaging solutions at mm-wave frequencies. Such a functionalized interposer could offer lower cost, higher electrical performance as compared to standard CMOS technologies.
Published: 2018
Full Text: View/download PDF

3. Infinite Impulse Response Filters for Nonuniform Data

Author: Bidégaray-Fesquet, Brigitte, Fesquet, Laurent, Equations aux Dérivées Partielles ( EDP ), Laboratoire Jean Kuntzmann ( LJK ), Université Pierre Mendès France - Grenoble 2 ( UPMF ) -Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ) -Université Pierre Mendès France - Grenoble 2 ( UPMF ) -Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), Techniques of Informatics and Microelectronics for integrated systems Architecture ( TIMA ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), ANR-11-LABX-0025-01,PERSYVAL-lab,Systèmes et Algorithmes Pervasifs au confluent des mondes physique et numérique ( 2011 ), Equations aux Dérivées Partielles (EDP ), Laboratoire Jean Kuntzmann (LJK ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National de Recherche en Informatique et en Automatique (Inria)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), ANR-11-LABX-0025,PERSYVAL-lab,Systemes et Algorithmes Pervasifs au confluent des mondes physique et numérique(2011), Bidégaray-Fesquet, Brigitte, Laboratoires d'excellence - Systemes et Algorithmes Pervasifs au confluent des mondes physique et numérique - - PERSYVAL-lab2011 - ANR-11-LABX-0025 - LABX - VALID, Equations aux Dérivées Partielles (EDP), Laboratoire Jean Kuntzmann (LJK), Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and ANR-11-LABX-0025-01,PERSYVAL-lab,Systèmes et Algorithmes Pervasifs au confluent des mondes physique et numérique(2011)
Subjects: Infinite Impulse Response Filters, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [ SPI.NANO ] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [ MATH.MATH-NA ] Mathematics [math]/Numerical Analysis [math.NA], [ SPI.SIGNAL ] Engineering Sciences [physics]/Signal and Image processing, [MATH.MATH-NA] Mathematics [math]/Numerical Analysis [math.NA], [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, Electro-cardiogramm, [MATH.MATH-NA]Mathematics [math]/Numerical Analysis [math.NA], [SPI.SIGNAL] Engineering Sciences [physics]/Signal and Image processing, Asynchronous and Event-Driven Systems
Abstract: International audience; Capturing and storing samples only when needed is a way to ensure a drastic reduction of the data to be processed, which is a crucial issue in many applications, such as autonomous and communicating smart devices (Internet of Things). This leads to nonuniform data for which specific processing chains have to be designed. In this paper, we discuss the issues to be address to generalize Infinite Impulse Response filters to the nonuniform case. We illustrate the performance of the constructed filters on an electrocardiogram signal, for two ways to obtain the nonuniform samples, and select linear decimation and the bilinear scheme as a good combination for this application.
Published: 2018

4. SEU sensitivity trends of three successive generations of COTS SRAMs at ultra low bias voltage

Author: Clemente, J.A., Fraire, J.A., Solinas, M., FRANCO, F.J., Villa, F., Rey, S., Baylac, M., Puchner, Helmut, MECHA, H., Velazco, R., Universidad Complutense de Madrid [Madrid] ( UCM ), Bioingénierie tissulaire ( BIOTIS ), Université Bordeaux Segalen - Bordeaux 2-Institut National de la Santé et de la Recherche Médicale ( INSERM ), Techniques of Informatics and Microelectronics for integrated systems Architecture ( TIMA ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), Complutense University of Madrid ( UCM ), Laboratoire de Physique Subatomique et de Cosmologie ( LPSC ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National de Physique Nucléaire et de Physique des Particules du CNRS ( IN2P3 ) -Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), Cypress Semiconductor, Universidad Complutense de Madrid [Madrid] (UCM), Bioingénierie tissulaire (BIOTIS), Université Bordeaux Segalen - Bordeaux 2-Institut National de la Santé et de la Recherche Médicale (INSERM), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Complutense University of Madrid (UCM), Laboratoire de Physique Subatomique et de Cosmologie (LPSC), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Universidad Complutense de Madrid = Complutense University of Madrid [Madrid] (UCM), Université de Bordeaux (UB)-Institut National de la Santé et de la Recherche Médicale (INSERM), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and Cypress Semiconductor [San Jose]
Subjects: [SPI.TRON]Engineering Sciences [physics]/Electronics, [ SPI.TRON ] Engineering Sciences [physics]/Electronics
Abstract: International audience; Radiation tests with 14.2 MeV neutrons were performed at ultra low bias voltages on COTSSRAMs manufactured on 130nm, 90nm and 65nm CMOS processes. Experimental resultswith power supplies in 0.5V-3.17V are presented and discussed
Published: 2017

5. Auxiliary Variables in Temporal Specifications: Semantic and Practical Analysis for System-Level Requirements

Author: Laurence Pierre, Techniques of Informatics and Microelectronics for integrated systems Architecture ( TIMA ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: SIMPLE (military communications protocol), Programming language, Computer science, Assertion, 02 engineering and technology, computer.software_genre, Computer Graphics and Computer-Aided Design, Operational semantics, 020202 computer hardware & architecture, Computer Science Applications, Auxiliary variables, PACS 8542, SystemC, 0202 electrical engineering, electronic engineering, information engineering, System level, 020201 artificial intelligence & image processing, [ SPI.NANO ] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Electrical and Electronic Engineering, computer, computer.programming_language, Abstraction (linguistics), Register-transfer level
Abstract: Assertion-based verification (ABV) for IP blocks given as synchronous RTL (register transfer level) descriptions has now widely gained acceptance. The challenge addressed here is ABV for systems on chip (SoC) modeled at the system level in SystemC TLM (Transactional Level Modeling). Requirements to be verified at this level of abstraction usually express temporal constraints on the interactions and communications in the SoC. We use the IEEE standard language PSL to formalize these temporal assertions which represent properties on communication actions and their parameters. Auxiliary variables are often indispensable for this formalization, but their use may induce semantic issues. This article discusses this matter, analyzes various existing approaches and proposes a summary of their advantages and shortcomings. They are also compared to our syntactic and semantic framework, implemented in a verification tool. The proposed operational semantics has the advantages of being simple and intuitive while supporting both global and local auxiliary variables. Experimental results on industrial case studies illustrate its applicability.
Published: 2016
Full Text: View/download PDF

6. A Tool For Analog/RF BIST Evaluation Using the Statistical Model of Circuit Output Parameters

Author: Beznia, Kamel, Bounceur, Ahcène, Euler, Reinhardt, Mir, Salvador, Lab-STICC_UBO_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192) (Lab-STICC), Université européenne de Bretagne - European University of Brittany (UEB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Télécom Bretagne-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Lab-STICC_ENSTAB_ CACS_MOCS, École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance ( Lab-STICC ), École Nationale d'Ingénieurs de Brest ( ENIB ) -Université de Bretagne Sud ( UBS ) -Université de Brest ( UBO ) -Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques ( IBNM ), Université de Brest ( UBO ) -Université européenne de Bretagne ( UEB ) -ENSTA Bretagne-Institut Mines-Télécom [Paris]-Centre National de la Recherche Scientifique ( CNRS ) -École Nationale d'Ingénieurs de Brest ( ENIB ) -Université de Bretagne Sud ( UBS ) -Université de Brest ( UBO ) -Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques ( IBNM ), Université de Brest ( UBO ) -Université européenne de Bretagne ( UEB ) -ENSTA Bretagne-Institut Mines-Télécom [Paris]-Centre National de la Recherche Scientifique ( CNRS ), Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (UMR 3192) ( Lab-STICC ), Université européenne de Bretagne ( UEB ) -Université de Bretagne Sud ( UBS ) -Université de Brest ( UBO ) -Institut Brestois du Numérique et des Mathématiques ( IBNM ), Université de Brest ( UBO ) -Télécom Bretagne-Institut Mines-Télécom [Paris]-Centre National de la Recherche Scientifique ( CNRS ), Techniques of Informatics and Microelectronics for integrated systems Architecture ( TIMA ), Université Joseph Fourier - Grenoble 1 ( UJF ) -Institut polytechnique de Grenoble - Grenoble Institute of Technology ( Grenoble INP ) -Institut National Polytechnique de Grenoble ( INPG ) -Centre National de la Recherche Scientifique ( CNRS ) -Université Grenoble Alpes ( UGA ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)
Subjects: [ SPI.NANO ] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Abstract: International audience; Testing analog integrated circuits is expensive in terms of both test equipment and time. To reduce the cost, Design-For-Test techniques (DFT) such as Built-In Self-Test (BIST) have been developed. For a given Circuit Under Test (CUT), the choice of a suitable technique should be made at the design stage as a result of the analysis of test metrics such as test escapes and yield loss. However, it is very hard to carry out this estimation for analog/RF circuits by using fault simulation techniques. Instead, the estimation of parametric test metrics is made possible by Monte Carlo circuit-level simulations and the construction of statistical models. These models represent the output parameter space of the CUT in which the test metrics are defined. In addition, models of the input parameter space may be required to accelerate the simulations and obtain higher confidence in the DFT choices. In this work, we describe a methodological flow for the selection of most adequate statistical models and several techniques that can be used for obtaining these models. Some of these techniques have been integrated into a Computer-Aided Test (CAT) tool for the automation of the process of test metrics estimation. This estimation is illustrated for the case of a BIST solution for CMOS imager pixels that requires the use of advanced statistical modeling techniques.
Published: 2015
Full Text: View/download PDF

7. Mining Missing Assumptions from Counter-Examples

Author: Guillaume Plassan, Dominique Borrione, Katell Morin-Allory, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Model checking, Functional verification, Property (philosophy), Computer science, 02 engineering and technology, Root cause, computer.software_genre, 020202 computer hardware & architecture, PACS 8542, Hardware and Architecture, 0202 electrical engineering, electronic engineering, information engineering, 020201 artificial intelligence & image processing, Data mining, computer, Software, Counterexample
Abstract: International audience; During the formal functional verification of Register-Transfer Level designs, a false failure is often observed. Most of the time, this failure is caused by an underconstrained model. The analysis of the root cause for the verification error and the creation of missing assumptions are a significant time burden. In this article, we present a methodology to automatically mine these missing assumptions from counter-examples. First, multiple counter-examples are generated for the same property. Then, relevant behaviors are mined from the counter-examples. Finally, corresponding assumptions are filtered and a small amount is returned to the user for review.
Published: 2019
Full Text: View/download PDF

8. Accurate and Efficient Continuous Time and Discrete Events Simulation in SystemC

Author: Fernandez-Mesa, B.J., Andrade Porras, Liliana Lilibeth, Pétrot, Frédéric, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), System Level Synthesis (SLS ), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and BEN TITO, Laurence
Subjects: [INFO.INFO-OH] Computer Science [cs]/Other [cs.OH], continuous time, SystemC-AMS, evenements discrets, discrete events, temps continu, PACS 85.42, [INFO.INFO-OH]Computer Science [cs]/Other [cs.OH], SystemC, simulation
Abstract: International audience; The AMS extensions of SystemC emerged to aid the virtual prototyping of continuous time and discrete event heterogeneous systems. Although useful for a large set of use cases, synchronization of both domains through a fixed timestep generates inaccuracies that cannot be overcome without penalizing simulation speed. We propose a direct, optimistic, and causal synchronization algorithm on top of the SystemC kernel that explicitly handles the rich set of interactions that occur in the domain interface. We test our algorithm with a complex nonlinear automotive use case and show that it breaks the described accuracy and efficiency trade-off. Our work enlarges the applicability range of SystemC AMS based design frameworks.
Published: 2020

9. Reducing Rollback Cost in VLSI Circuits to Improve Fault Tolerance

Author: Thierry Bonnoit, Michael Nicolaidis, Nacer-Eddine Zergainoh, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: fault, Computer science, Overhead (engineering), Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, checkpoint, 0202 electrical engineering, electronic engineering, information engineering, rollback, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Electrical and Electronic Engineering, Electronic circuit, Very-large-scale integration, Combinational logic, business.industry, 020208 electrical & electronic engineering, Fault tolerance, error, 020202 computer hardware & architecture, PACS 8542, Soft error, soft, Hardware and Architecture, Embedded system, business, Software, Rollback, Hardware_LOGICDESIGN
Abstract: International audience; In nanometer technologies, circuits are more and more sensitive to various kinds of perturbations. Alpha particles and atmospheric neutrons induce single-event upsets, affecting memory cells, latches, and flip-flops. They also induce single-event transients, initiated in the combinational logic and captured by the latches and flip-flops associated with the outputs of this logic. In the past, the major efforts were related on memories. However, as the whole situation is getting worse, solutions that protect the entire design are mandatory. Solutions for detecting the error in logic functions already exist, but there are only few solutions allowing the correction, leading to a lot of hardware overhead in nonprocessor design. In this paper, we present a novel technique that includes several hardware architectures and an algorithm for their implementations, which reduces the cost of rollback in any kinds of circuit.
Published: 2018
Full Text: View/download PDF

10. Implementation and Characterization of a Physical Unclonable Function for IoT: A Case Study With the TERO-PUF

Author: Cedric Marchand, Viktor Fischer, Ugo Mureddu, Abdelkarim Cherkaoui, Nathalie Bochard, Lilian Bossuet, Laboratoire Hubert Curien [Saint Etienne] (LHC), Université Jean Monnet [Saint-Étienne] (UJM)-Centre National de la Recherche Scientifique (CNRS)-Institut d'Optique Graduate School (IOGS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Salutary hardware design to fight against integrated circuit counterfeiting and theft, SALWARE. ANR-13-JS03-0003,Salutary hardware design to fight against integrated circuit counterfeiting and theft, SALWARE. ANR-13-JS03-0003, European Project: 644052,H2020,H2020-ICT-2014-1,HECTOR(2015), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), ANR-13-JS03-0003,SALWARE,Conception de matériel salutaire pour lutter contre la contrefaçon et le vol de circuits intégrés(2013), Laboratoire Hubert Curien (LHC), and Institut d'Optique Graduate School (IOGS)-Université Jean Monnet - Saint-Étienne (UJM)-Centre National de la Recherche Scientifique (CNRS)
Subjects: Engineering, Traceability, PUF characterization, Physical unclonable function, Interoperability, Access control, 02 engineering and technology, PUF design, Unique identifier, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], 0202 electrical engineering, electronic engineering, information engineering, Oscillators, Delays, Electrical and Electronic Engineering, Field-programmable gate array, FPGA, Authentication, business.industry, 020208 electrical & electronic engineering, Field programmable gate arrays, 020206 networking & telecommunications, Inverters, Computer Graphics and Computer-Aided Design, Embedded system, Scalability, [INFO.INFO-ES]Computer Science [cs]/Embedded Systems, business, Software
Abstract: International audience; Today, life is becoming increasingly connected. From TVs to smartphones, including vehicles, buildings, and household appliances, everything is interconnected in what we call the "Internet of Things" (IoT). IoT is now part of our life and we have to deal with it. More than 10 billion devices are already connected and five times more are expected to be deployed in the next five years. While deployment and integration of IoT is expanding, one of the main challenge is to provide practical solutions to security, privacy and trust issues in IoT. Protection and security mechanisms need to include features such as interoperability and scalability but also traceability, authentication and access control while remaining lightweight. Among the most promising approaches to such security mechanisms, physical unclonable functions (PUF) provide a unique identifier for similar but different integrated circuits using some of their physical characteristics. These types of functions can thus be used to authenticate integrated circuits, provide traceability and access control. This paper presents a comprehensive case study of the transient effect ring oscillator (TERO) PUF from its implementation on FPGAs to its complete characterization. The implementation of the PUF is detailed for two different families of FPGAs: Xilinx Spartan 6 and Altera Cyclone V. All the metrics used for the characterization are explained in detail and the results of the characterization include robustness to environmental parameters including variations in temperature and voltage. Finally, we compare our results with those obtained for another PUF: the ring oscillator (RO) PUF. All the design files are available online to ensure repeatability and enable comparison of our contribution with other studies.
Published: 2018
Full Text: View/download PDF

11. WSN Simulators Evaluation: An Approach Focusing on Energy awareness

Author: Bakni, Michel, Manuel, Luis, Chacón, Moreno, Cardinale, Yudith, Terrasson, Guillaume, Curea, Octavian, ESTIA Recherche, Ecole Supérieure des Technologies Industrielles Avancées (ESTIA), Universidad Simon Bolivar (USB), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and OUDINI
Subjects: FOS: Computer and information sciences, Process (engineering), Computer science, 02 engineering and technology, Energy awareness, Energy Consumption, 01 natural sciences, Set (abstract data type), Computer Science - Networking and Internet Architecture, Methodological approach, Simulators, 0202 electrical engineering, electronic engineering, information engineering, Networking and Internet Architecture (cs.NI), business.industry, 010401 analytical chemistry, 020206 networking & telecommunications, Energy consumption, [INFO.INFO-MO]Computer Science [cs]/Modeling and Simulation, 0104 chemical sciences, Wireless Sensors Networks, [SPI.TRON]Engineering Sciences [physics]/Electronics, Scalability, State (computer science), Software engineering, business, Wireless sensor network
Abstract: The large number of Wireless Sensor Networks (WSN) simulators available nowadays, differ in their design, goals, and characteristics. Users who have to decide which simulator is the most appropriate for their particular requirements, are today lost, faced with a panoply of disparate and diverse simulators. Hence, it is obvious the need for establishing guidelines that support users in the tasks of selecting a simulator to suit their preferences and needs. In previous works, we proposed a generic and novel approach to evaluate networks simulators, considering a methodological process and a set of qualitative and quantitative criteria. In particularly, for WSN simulators, the criteria include relevant aspects for this kind of networks, such as energy consumption modelling and scalability capacity. The aims of this work are: (i) describe deeply the criteria related to WSN aspects; (ii) extend and update the state of the art of WSN simulators elaborated in our previous works to identify the most used and cited in scientific articles; and (iii) demonstrate the suitability of our novel methodological approach by evaluating and comparing the three most cited simulators, specially in terms of energy modelling and scalability capacities. Results show that our proposed approach provides researchers with an evaluation tool that can be used to describe and compare WSN simulators in order to select the most appropriate one for a given scenario, 20 Pages
Published: 2020
Full Text: View/download PDF

12. Trojan Detection Test for Clockless Circuits

Author: Ricardo Aquino Guazzelli, Thiago Ferreira de Paiva Leite, Laurent Fesquet, Matheus Garay Trindade, Rodrigo Possamai Bastos, Leonel Acunha Guimaraes, Circuits, Devices and System Integration (CDSI), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: Computer science, quasi-delay insensitive, clockless circuit, 02 engineering and technology, Integrated circuit, law.invention, hardware Trojan, Hardware Trojan, law, 0202 electrical engineering, electronic engineering, information engineering, Hardware_INTEGRATEDCIRCUITS, transient current, support vector machine, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Electronic circuit, business.industry, 020208 electrical & electronic engineering, Transistor, side channels, Trojan detection, Signature (logic), 020202 computer hardware & architecture, machine learning, PACS 8542, CMOS, Trojan, Embedded system, business, asynchronous circuit, Asynchronous circuit, current signature
Abstract: International audience; Clockless integrated circuits, as any type of integrated system, might today carry hardware Trojan (HT) circuits maliciously implanted in the designs during outsourced phases of fabrication. This paper proposes a testing technique dedicated to detect HTs in clockless circuits fabricated in CMOS technologies. The proposed technique applies a well-known machine learning approach – One-Class Support Vector Machine (OC-SVM) – for dealing with the particular current signature features of clockless circuits. Through simulation experiments we show the natural ability of clockless circuits in providing individual current signatures for identifying the presence of HTs. Moreover, the results demonstrate that our testing technique requires no extra circuitry or power ports to detect HTs of a few dozens of transistors in designs under Trojan test with more than 13 thousand transistors.
Published: 2020

13. Resonant optical transduction for photoacoustic detection

Author: Alain Glière, Skandar Basrour, Thomas Lauwers, Lauwers, Thomas, Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI), Université Grenoble Alpes (UGA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Circuits, Devices and System Integration (TIMA-CDSI), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), and Circuits, Devices and System Integration (CDSI)
Subjects: Optical fiber, Cantilever, Materials science, hinged cantilever microphone, [SPI.OPTI] Engineering Sciences [physics]/Optics / Photonic, acoustic sensor, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Physics::Optics, Optical power, 02 engineering and technology, 01 natural sciences, law.invention, Optics, law, 0202 electrical engineering, electronic engineering, information engineering, [PHYS.PHYS.PHYS-INS-DET]Physics [physics]/Physics [physics]/Instrumentation and Detectors [physics.ins-det], [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Sound pressure, optical transduction, [SPI.ACOU]Engineering Sciences [physics]/Acoustics [physics.class-ph], [SPI.ACOU] Engineering Sciences [physics]/Acoustics [physics.class-ph], business.industry, 010401 analytical chemistry, Linearity, 020206 networking & telecommunications, Finite element method, 0104 chemical sciences, Trace gas, Transduction (biophysics), [PHYS.PHYS.PHYS-INS-DET] Physics [physics]/Physics [physics]/Instrumentation and Detectors [physics.ins-det], [SPI.OPTI]Engineering Sciences [physics]/Optics / Photonic, Fiber-optic Fabry-Perot, photoacoustic sensor, business
Abstract: International audience; A highly sensitive optical transduction system suitable for photoacoustic trace gas detection is presented. The system includes a thin deformable hinged cantilever assembled on an optical fiber to form a Fabry-Perot cavity, whose length varies according to the acoustic pressure disturbance. Consequently, the optical power of the reflected light fluctuates at acoustic frequencies around the working point, which is stabilized to prevent from environmental drift of the interference fringes. The resonant mechanical structure proposed in this study shows a spectral response in good agreement with FEM simulation, good linearity and stability, with a noise equivalent pressure of 12 $\mu$Pa/√Hz.
Published: 2020

14. Assessment of On-Chip Current Sensor for Detection of Thermal-Neutron Induced Transients

Author: J. Beaucour, M. Letiche, B. Cheymol, R. Possamai Bastos, Raphael A. C. Viera, M. Garay Trindade, Jean-Max Dutertre, Olivier Potin, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Ecole Nationale Supérieure des Mines de St Etienne, Institut Laue-Langevin (ILL), ILL, Laboratoire de Physique Subatomique et de Cosmologie (LPSC), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Circuits, Devices and System Integration (CDSI), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), and Partly supported by Persyval project ANR-11-LABX-0025-01 and by MultiRad project (évaluation des effets des radiations cosmiques dans des systèmes informatiques multi-coeurs d'applications critiques) funded by Région Rhône-Alpes's international Ambition Pack
Subjects: Nuclear and High Energy Physics, Materials science, 010308 nuclear & particles physics, business.industry, Integrated circuit, Hardware_PERFORMANCEANDRELIABILITY, Radiation, Chip, 01 natural sciences, Neutron temperature, law.invention, PACS 8542, Nuclear Energy and Engineering, CMOS, law, 0103 physical sciences, Hardware_INTEGRATEDCIRCUITS, Optoelectronics, Neutron, Current sensor, Transient (oscillation), Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, ComputingMilieux_MISCELLANEOUS
Abstract: International audience; This article assesses, for the first time, a body/bulk built-in current sensor (BBICS) in a CMOS 65-nm test chip under thermal neutron, high-energy neutron, and laser radiation. Experimental results suggest that the on-chip current sensor is effective to detect transient faults in different case-study subcircuits of the chip exposed to the accelerated radiation effects, opening prospects for embedding this type of sensor in reliable, secure, and low-power integrated circuit applications
Published: 2020
Full Text: View/download PDF

15. Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model

Author: Ahcène Bounceur, Salvador Mir, Kamel Beznia, Reinhardt Euler, Lab-STICC_UBS_CACS_MOCS, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Lab-STICC_UBO_CID_DECIDE, École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Lab-STICC_UBO_CACS_MOCS, Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université de Brest (UBO)-Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut Mines-Télécom [Paris] (IMT)-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO), and Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: Computer science, statistical modeling, Computation, Monte Carlo method, Probability density function, Statistical model, 02 engineering and technology, Bivariate analysis, analog and mixed-signal test, Computer Graphics and Computer-Aided Design, 020202 computer hardware & architecture, PACS 8542, Cover (topology), test metrics, 0202 electrical engineering, electronic engineering, information engineering, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Extreme value theory, Algorithm, Software, Parametric statistics
Abstract: Analog/RF built-in test (BIT) techniques are essential for reducing the very high costs of specification-based tests and for high-safety applications. The adoption of a BIT technique needs to be decided at the design stage, and this can be facilitated by estimating the test quality in terms of errors such as test escapes ( ${T_{E}}$ ) and yield loss ( ${Y_{L}}$ ). Test quality estimation at the design stage has been traditionally very difficult for analog/RF circuits due to the lack of fault models that properly cover parametric faulty behavior. In recent years, statistical simulation has been considered in combination with learning techniques for the estimation of parametric test metrics. Extreme value theory (EVT) has provided a rigorous tool for the computation of parametric test metrics. However, test metrics estimation has been limited to the use of a univariate model. In this paper, we extend this approach by using a multivariate extreme value model. We illustrate this for the evaluation of an RF LNA BIT technique using a bivariate model.
Published: 2020
Full Text: View/download PDF

16. Reliability of neuromorphic computing

Author: Vatajelu, Elena Ioana, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), BEN TITO, Laurence, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: National audience
Published: 2019

17. Nanostructure engineering of epitaxial piezoelectric α-quartz thin films on silicon

Author: Zhang, Qianzhe, Sanchez, David, Desgarceaux, Rudy, Gomez, A., Escofet-Majoral, Pau, Oró-Soler, J, Gàzquez, J., Larrieu, G., Charlot, Benoit, Gich, M, Carretero-Genevrier, Adrian, Institut de Ciència de Materials de Barcelona (ICMAB), Consejo Superior de Investigaciones Científicas [Spain] (CSIC), Institut de Mathématiques de Toulouse UMR5219 (IMT), Institut National des Sciences Appliquées - Toulouse (INSA Toulouse), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université Toulouse 1 Capitole (UT1)-Université Toulouse - Jean Jaurès (UT2J)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS), Institut d’Electronique et des Systèmes (IES), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), Galaxies, Etoiles, Physique, Instrumentation (GEPI), Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire de Paris, PSL Research University (PSL)-PSL Research University (PSL)-Centre National de la Recherche Scientifique (CNRS), Institut d’Électronique, de Microélectronique et de Nanotechnologie (IEMN) - UMR 8520 (IEMN), Centre National de la Recherche Scientifique (CNRS)-Université de Lille-Université Polytechnique Hauts-de-France (UPHF)-Ecole Centrale de Lille-Université Polytechnique Hauts-de-France (UPHF)-Institut supérieur de l'électronique et du numérique (ISEN), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Matériaux, MicroCapteurs et Acoustique (M2A), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), Consejo Superior de Investigaciones Científicas [Madrid] (CSIC), Université Toulouse Capitole (UT Capitole), Université de Toulouse (UT)-Université de Toulouse (UT)-Institut National des Sciences Appliquées - Toulouse (INSA Toulouse), Institut National des Sciences Appliquées (INSA)-Université de Toulouse (UT)-Institut National des Sciences Appliquées (INSA)-Université Toulouse - Jean Jaurès (UT2J), Université de Toulouse (UT)-Université Toulouse III - Paul Sabatier (UT3), Université de Toulouse (UT)-Centre National de la Recherche Scientifique (CNRS), Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL)-Université Paris Diderot - Paris 7 (UPD7)-Centre National de la Recherche Scientifique (CNRS), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Université Toulouse 1 Capitole (UT1), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Université Toulouse - Jean Jaurès (UT2J)-Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS), Centre National de la Recherche Scientifique (CNRS)-Institut national des sciences de l'Univers (INSU - CNRS)-Université Paris Diderot - Paris 7 (UPD7)-Observatoire de Paris, Université Paris sciences et lettres (PSL)-Université Paris sciences et lettres (PSL), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: nanostructuration, piezoelectricity, thin films, epitaxial growth, silicon, Quartz, [CHIM.MATE]Chemical Sciences/Material chemistry
Abstract: The monolithic integration of sub-micron quartz structures on silicon substrates is a key issue for the future development of telecommunication to the GHz frequencies. Here we report unprecedented large-scale fabrication of ordered arrays of piezoelectric epitaxial quartz nanostructures on silicon substrates by the combination of soft-chemistry and three cost effective lithographic techniques: (i) laser transfer lithography, (ii) soft nanoimprint lithography on Sr-doped SiO2 sol-gel thin films and (iii) self-assembled SrCO3 nanoparticles reactive nanomasks. Epitaxial α-quartz nanopillars with different diameters (down to 50 nm) and heights (up to 2000 nm) were obtained for the first time. This work proves the control over the shape, micro-and nano-patterning of quartz thin films while preserving its crystallinity, texture and piezoelectricity. This work opens up the opportunity to fabricate new high frequency resonators and high sensitivity sensors relevant in different fields of application.
Published: 2019

18. IEEE European Test Symposium (ETS)

Author: Elena Ioana Vatajelu, Jaan Raik, Matteo Sonza Reorda, Mehdi B. Tahoori, Maria K. Michael, Artur Jutman, Stephan Eggersgluss, Said Hamdioui, Mentor Graphics Corp. (USA), Computer Engineering - Delft University of Technology (CE), Delft University of Technology (TU Delft), Testonica Labs (Testonica Labs), University of Cyprus [Nicosia], Tallinn Technical University, Politecnico di Torino [Torino] (Polito), Karlsruhe Institute of Technology (KIT), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Politecnico di Torino = Polytechnic of Turin (Polito), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: Engineering, business.industry, 020204 information systems, PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Library science, 020206 networking & telecommunications, 02 engineering and technology, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, ComputingMilieux_MISCELLANEOUS, Test (assessment)
Abstract: International audience; This paper is dedicated to the IEEE European Test Symposium (ETS). It offers an overview of all the European Test Workshop and Symposium events, from its first edition in 1996 to the next edition in 2020.
Published: 2019
Full Text: View/download PDF

19. Improving Monte Carlo simulations for an accurate modeling of soot aggregation

Author: José Morán, Jerôme Yon, Alexandre Poux, Liu, F., Andrés Fuentes, Complexe de recherche interprofessionnel en aérothermochimie (CORIA), Centre National de la Recherche Scientifique (CNRS)-Institut national des sciences appliquées Rouen Normandie (INSA Rouen Normandie), Institut National des Sciences Appliquées (INSA)-Normandie Université (NU)-Institut National des Sciences Appliquées (INSA)-Normandie Université (NU)-Université de Rouen Normandie (UNIROUEN), Normandie Université (NU), Transferts, écoulements, fluides, énergétique (TREFLE), Université Sciences et Technologies - Bordeaux 1-École Nationale Supérieure de Chimie et de Physique de Bordeaux (ENSCPB)-Centre National de la Recherche Scientifique (CNRS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Normandie Université (NU)-Institut National des Sciences Appliquées (INSA)-Normandie Université (NU)-Institut National des Sciences Appliquées (INSA)-Université de Rouen Normandie (UNIROUEN), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and Yon, Jérôme
Subjects: [PHYS.PHYS.PHYS-CLASS-PH]Physics [physics]/Physics [physics]/Classical Physics [physics.class-ph], [PHYS.PHYS.PHYS-CLASS-PH] Physics [physics]/Physics [physics]/Classical Physics [physics.class-ph]
Abstract: International audience; The aggregation of soot particles is probably the most important mechanism of growth. In this context, particles naturally evolve into polydisperse sizes [1]. These particles experience a movement characterized by very different momentum relaxation times (i.e. the ratio between the particle mass and friction coefficient). Thus, accurate numerical methods, such as Langevin Dynamics become computationally expensive to simulate the coagulation of a large population of particles [2]. On the other hand, the Monte Carlo (MC) method (simply consisting in iteratively selecting a particle at time, moving it in a random orientation and checking for collisions), is a very computationally efficient alternative to overcome this issue. However, it is usually regarded as a technique that relies on an artificial description of time making it difficult to study aggregation process [3]. Despite this, some efforts have been made to obtain a more physical description of time [4, 5]. Unfortunately, as we will show, they usually lead to incoherent time progress for the ensemble of polydisperse particles and/or they are restricted to specific flow regimes (continuum or free molecular). Also, in different studies based on the MC method, the probability of moving a particle is adapted to the specific flow regimes with some rules whose expressions lack of justification [6]. Moreover, in such studies, particles are usually displaced along a constant distance in the order of the monomer’s diameters, regardless of their sizes. A few studies have considered size-dependent displacements [7]. In this study, we propose a new MC method with justified probabilities of particles movement, considering size-dependent displacement and able to bring a validated and consistent physical time evolution for individual as well as for the ensemble of polydisperse particles.The method is firstly presented and compared with previous methods found in the literature to finally validate it by comparison with Langevin Dynamics simulations. The evolution of calculated mean squared displacements for different-sized particles is compared with theoretical values. The method is able to efficiently simulate the dynamics of coagulation. For the first time, consistent and coherent residence times of particles are obtained. The proposed MC method could be used to study more complex dynamic processes such as aggregates sintering, surface growth or breakage.
Published: 2019

20. Excitation, ionization, neutralization and anionic production in collisions of C + , N + and C n N + ( n = 1–3) with He atoms at 2.2 a.u. velocity; cross sections and dissociation branching ratios

Author: Clara Illescas, A. Le Padellec, Thibaut Launoy, T Mahajan, T Idbarkach, Néstor F. Aguirre, Marin Chabot, Sergio Díaz-Tendero, A. Jallat, B Pons, A. Jorge, K. Béroff, Institut des Sciences Moléculaires d'Orsay (ISMO), Université Paris-Sud - Paris 11 (UP11)-Centre National de la Recherche Scientifique (CNRS), Centre d'Etudes Lasers Intenses et Applications (CELIA), Université de Bordeaux (UB)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Institut de recherche en astrophysique et planétologie (IRAP), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Observatoire Midi-Pyrénées (OMP), Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS), Institut de Physique Nucléaire d'Orsay (IPNO), Université Paris-Sud - Paris 11 (UP11)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Centre National de la Recherche Scientifique (CNRS), Laboratoire des collisions atomiques et moléculaires (LCAM), Centre National de la Recherche Scientifique (CNRS)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Université de Bordeaux (UB), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut national des sciences de l'Univers (INSU - CNRS)-Université Toulouse III - Paul Sabatier (UT3), Météo France-Centre National d'Études Spatiales [Toulouse] (CNES)-Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS)-Institut de Recherche pour le Développement (IRD)-Météo France-Centre National d'Études Spatiales [Toulouse] (CNES)-Centre National de la Recherche Scientifique (CNRS)-Institut de Recherche pour le Développement (IRD)-Centre National de la Recherche Scientifique (CNRS), Centre National de la Recherche Scientifique (CNRS)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Université Paris-Sud - Paris 11 (UP11), Université de Toulouse (UT)-Université de Toulouse (UT)-Institut national des sciences de l'Univers (INSU - CNRS)-Observatoire Midi-Pyrénées (OMP), Institut de Recherche pour le Développement (IRD)-Université Toulouse III - Paul Sabatier (UT3), and Université de Toulouse (UT)-Université de Toulouse (UT)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National d'Études Spatiales [Toulouse] (CNES)-Centre National de la Recherche Scientifique (CNRS)-Météo-France -Institut de Recherche pour le Développement (IRD)-Institut national des sciences de l'Univers (INSU - CNRS)-Centre National d'Études Spatiales [Toulouse] (CNES)-Centre National de la Recherche Scientifique (CNRS)-Météo-France -Centre National de la Recherche Scientifique (CNRS)
Subjects: Physics, [PHYS]Physics [physics], Condensed Matter Physics, Branching (polymer chemistry), 01 natural sciences, 7. Clean energy, Molecular physics, Atomic and Molecular Physics, and Optics, Dissociation (chemistry), Neutralization, 010305 fluids & plasmas, Ionization, 0103 physical sciences, 010306 general physics, Excitation, ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2019
Full Text: View/download PDF

21. A Distributed Body-Biasing Strategy for Asynchronous Circuits

Author: Katell Morin-Allory, T. Ferreira de Paiva Leite, M. Diallo, Laurent Fesquet, Sylvain Engels, Yoan Decoudu, O. Rolloff, A. R. Iga Jadue, R. Possamai Bastos, Circuits, Devices and System Integration (CDSI), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), STMicroelectronics [Crolles] (ST-CROLLES), BEN TITO, Laurence, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: Standard cell, Power management, Handshake, Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Transistor, 02 engineering and technology, 021001 nanoscience & nanotechnology, 020202 computer hardware & architecture, law.invention, law, Asynchronous communication, Robustness (computer science), PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 0210 nano-technology, ComputingMilieux_MISCELLANEOUS, Hardware_LOGICDESIGN, Electronic circuit, Asynchronous circuit
Abstract: The fast evolving pace of electronic mobile devices have made mandatory to reduce power consumption without compromising the circuit performance or its robustness. Asynchronous circuits have demonstrated to be an excellent solution to help designing robust and energy-efficient circuits required for the Internet-of-Things and the mobile applications. Their local synchronization mechanisms, based on handshake protocols, make them perfectly suitable for exploiting dynamic power management techniques, such as Adaptive Body Biasing (ABB) in FD-SOI technologies. Indeed, the circuit activity is simply detected by using the already existing handshake signals, enabling the application of different ABB strategies with almost no modification to the original asynchronous circuit. As the synchronization mechanisms are local to small logic blocks, the ABB strategy is able to target from small to large body bias domains. In order to manage such a technique, an analog dedicated standard cell has been designed to body bias small regions. Depending on the body bias domain granularity, an appropriated number of these specific cells is inserted exactly as logic standard cells during the back-end operations. Additionally, the robustness of asynchronous circuits makes possible changing the transistor threshold voltage on-the-fly, a requirement for applying ABB schemes without complex power management issues.
Published: 2019

22. Rebooting Computing: The Challenges for Test and Reliability

Author: Alberto Bosio, F. K. Lima, Elena Ioana Vatajelu, Gennaro S. Rodrigues, Surya Nagarajan, G. Di Natale, Said Hamdioui, Moritz Fieback, Lorena Anghel, Ian O'Connor, INL - Conception de Systèmes Hétérogènes (INL - CSH), Institut des Nanotechnologies de Lyon (INL), Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-École Centrale de Lyon (ECL), Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-École supérieure de Chimie Physique Electronique de Lyon (CPE)-Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-École supérieure de Chimie Physique Electronique de Lyon (CPE), Laboratoire d'électronique, optoélectronique et microsystèmes (LEOM), École Centrale de Lyon (ECL), Université de Lyon-Université de Lyon-Centre National de la Recherche Scientifique (CNRS), Instituto de Informática da UFRGS (UFRGS), Universidade Federal do Rio Grande do Sul [Porto Alegre] (UFRGS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Departamento de Engenharia Eletrica (UFRGS), Delft University of Technology (TU Delft), Université de Lyon-Université de Lyon-Centre National de la Recherche Scientifique (CNRS)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-École supérieure de Chimie Physique Electronique de Lyon (CPE)-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-École Centrale de Lyon (ECL), Université de Lyon, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Université de Lyon-Université de Lyon-Université Claude Bernard Lyon 1 (UCBL), Université de Lyon-École supérieure de Chimie Physique Electronique de Lyon (CPE)-Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)-École Centrale de Lyon (ECL), and Université de Lyon-Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS)
Subjects: Computer science, Emerging technologies, Reliability (computer networking), media_common.quotation_subject, 02 engineering and technology, computer.software_genre, 01 natural sciences, Index Terms-Alternative computing architectures, fault model, test, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Quality (business), [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS, media_common, 010302 applied physics, emerging technology, reliability, Fault tolerance, 020202 computer hardware & architecture, Neuromorphic engineering, Programming paradigm, Systems engineering, Compiler, computer, Reboot
Abstract: International audience; Today's computer architectures and semiconductor technologies are facing major challenges making them incapable to deliver the required features (such as computer efficiency) for emerging applications. Alternative architectures are being under investigation in order to continue deliver sustainable benefits for the foreseeable future society at affordable cost. These architectures are not only changing the traditional computing paradigm (e.g., in terms of programming models, compilers, circuit design), but also setting up new challenges and directions on the way these architectures should be tested to guarantee the required quality and reliability levels. This paper highlights the major open questions regarding test and reliability of three emerging computing paradigms being approximate computing, computation-in-memory and neuromorphic computing.
Published: 2019
Full Text: View/download PDF

23. Reduced-Code Techniques for On-Chip Static Linearity Test of SAR ADCs

Author: Salvador Mir, Manuel J. Barragan, Renato S. Feitoza, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: Computer science, Capacitive sensing, 020208 electrical & electronic engineering, Linearity, Successive approximation ADC, Topology (electrical circuits), Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, Converters, 020202 computer hardware & architecture, law.invention, Capacitor, Built-in self-test, law, PACS 85.42, Hardware_INTEGRATEDCIRCUITS, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, System on a chip, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: International audience; This work presents reduced-code strategies for the static linearity test of successive-approximation analog-to-digital converters. Reduced-code techniques for ADC static linearity test may drastically reduce the test time for static linearity characterization. These techniques take advantage of the repetitive operation of SAR ADCs for reducing the number of necessary measurements for static linearity testing. In this paper we discuss the implementation of these techniques for three widely used SAR ADC topologies. Namely, we consider SAR ADCs based on binary-weighted capacitive DACs, split-capacitor DACs and segmented DACs. The proposed techniques are validated by behavioral simulations on three SAR ADC case studies.
Published: 2019
Full Text: View/download PDF

24. On-Chip Ageing Monitoring and System Adaptation

Author: Florian Cacho, Lorena Anghel, R. Shah, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), STMicroelectronics [Crolles] (ST-CROLLES), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: Computer science, 020208 electrical & electronic engineering, Process (computing), 02 engineering and technology, 020202 computer hardware & architecture, Compensation (engineering), Large sample, PACS 8542, Reliability (semiconductor), 0202 electrical engineering, electronic engineering, information engineering, Range (statistics), Electronic engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Adaptation (computer science), Frequency scaling, Voltage
Abstract: International audience; Process, voltage, temperature and ageing variations have become important issues in nanometre technology nodes, and thus on-chip accurate reliability and performance monitors have become necessary for adaptive compensation schemes. This chapter presents up-to-date state-of-the-art performance and reliability monitors, insertion methodology and experimental results of different monitors used for process and environment variations as well as ageing compensation. Voltage and frequency scaling techniques are combined with monitors to ensure fault-free operation. Measurements and simulations were performed on large sample sets for varied range of process, voltages, temperatures and ageing to argument on the choice of paths to be monitored and to illustrate adaptive compensation techniques.
Published: 2019
Full Text: View/download PDF

25. Skilled manpower shortage in microelectronics A challenge for the french education microelectronics network

Author: Ahmad Bsiesy, Olivier Bonnaud, Laurent Fesquet, Institut d'Électronique et des Technologies du numéRique (IETR), Université de Nantes (UN)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire des technologies de la microélectronique (LTM ), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), ANR-11-IDFI-0017, ANR-11-IDFI-0017,FINMINA,Réseau national pour les Formations INnovantes en MIcro et Nanoélectronique(2011), Université de Nantes (UN)-Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Nantes Université (NU)-Université de Rennes 1 (UR1), Institut d'Electronique et de Télécommunications de Rennes (IETR), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Laboratoire des technologies de la microélectronique (LTM), and Centre National de la Recherche Scientifique (CNRS)-Université Joseph Fourier - Grenoble 1 (UJF)-Université Grenoble Alpes (UGA)-Commissariat à l'Énergie Atomique et aux Énergies Alternatives (CEA) - Grenoble
Subjects: Pedagogical approach for engineers, Engineering, Smart system, business.industry, 4. Education, media_common.quotation_subject, French national network, Jobs in shortage, Context (language use), Economic shortage, 02 engineering and technology, Engineering management, Broad spectrum, Presentation, [SPI]Engineering Sciences [physics], Microelectronics, 020204 information systems, 0202 electrical engineering, electronic engineering, information engineering, business, Industrial Revolution, Internet of Things, media_common
Abstract: International audience; The rapid growth of the Internet of Things associated with the fourth industrial revolution requires more and more connected objects and smart systems. Microelectronics is technically at the very core of all these systems and must therefore contribute to this development. To achieve this, it is necessary to develop highly specialized but also broad spectrum skills and know-how. The industry worldwide observes a shortage of these skills and identifies areas of stressed. The educational world of engineering must therefore respond to this demand and adapt its pedagogical approaches and content. This is the mission of the French microelectronics training network, which focuses on innovation in accordance with the emerging needs. After a presentation of the technical and technological context, industrial needs and examples of innovative approaches taken by the network are presented. © 2019 IEEE.
Published: 2019
Full Text: View/download PDF

26. Topology and design investigation on thin film silicon BIMOS device for ESD protection in FD-SOI technology

Author: Philippe Galy, Louise de Conti, Maud Vinet, Cristoloveanu, S., Delahaye, G., Lorena Anghel, STMicroelectronics [Crolles] (ST-CROLLES), Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI), Université Grenoble Alpes (UGA)-Direction de Recherche Technologique (CEA) (DRT (CEA)), Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation (IMEP-LAHC), Centre National de la Recherche Scientifique (CNRS)-Université Savoie Mont Blanc (USMB [Université de Savoie] [Université de Chambéry])-Institut National Polytechnique de Grenoble (INPG)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Université Grenoble Alpes (UGA), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and BEN TITO, Laurence
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2019

27. Assessment of Current Sensor on Chip for Detecting Neutron-Induced Transients via Body Terminals

Author: Possamai Bastos, Rodrigo, DUTERTRE, Jean-Max, Garay Trindade, M., Camponogara-Viera, Raphael Andreoni, Potin, Olivier, Rey, S., Cheymol, B., Baylac, M., Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), École des Mines de Saint-Étienne (Mines Saint-Étienne MSE), Institut Mines-Télécom [Paris] (IMT), Laboratoire de Physique Subatomique et de Cosmologie (LPSC), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), BEN TITO, Laurence, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, ComputingMethodologies_IMAGEPROCESSINGANDCOMPUTERVISION, Hardware_PERFORMANCEANDRELIABILITY, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Abstract: International audience; This work assesses for the first time a body built-in current sensor in a CMOS 65-nm test chip under neutron radiation and laser irradiation. The sensor is effective to detect transient faults induced from both.
Published: 2019

28. Bayesian time-domain multiple sound source localization for a stochastic machine

Author: Emmanuel Mazer, Laurent Girin, Marvin Faix, Raphael Frisch, Jacques Droulez, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Interaction située avec les objets et environnements intelligents (PERVASIVE), Inria Grenoble - Rhône-Alpes, Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-Laboratoire d'Informatique de Grenoble (LIG), Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Institut des Systèmes Intelligents et de Robotique (ISIR), Sorbonne Université (SU)-Centre National de la Recherche Scientifique (CNRS), CRISSP (GIPSA-CRISSP), Département Parole et Cognition (GIPSA-DPC), Grenoble Images Parole Signal Automatique (GIPSA-lab), Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Grenoble Images Parole Signal Automatique (GIPSA-lab), Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-GIPSA Pôle Parole et Cognition (GIPSA-PPC), Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Université Pierre Mendès France - Grenoble 2 (UPMF)-Université Stendhal - Grenoble 3-Université Joseph Fourier - Grenoble 1 (UJF)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Institut National de Recherche en Informatique et en Automatique (Inria)-Institut National de Recherche en Informatique et en Automatique (Inria)-Laboratoire d'Informatique de Grenoble (LIG ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), GIPSA - Cognitive Robotics, Interactive Systems, & Speech Processing (GIPSA-CRISSP), Grenoble Images Parole Signal Automatique (GIPSA-lab ), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Grenoble Images Parole Signal Automatique (GIPSA-lab ), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], Signal processing, Computer science, Bayesian probability, 020206 networking & telecommunications, Statistical model, specific hardware, 02 engineering and technology, Acoustic source localization, Bayesian stochastic machine, time-domain processing, Bayesian inference, Robustness (computer science), [INFO.INFO-SD]Computer Science [cs]/Sound [cs.SD], 0202 electrical engineering, electronic engineering, information engineering, 020201 artificial intelligence & image processing, Multiple sound source localization, Time domain, Algorithm, ComputingMilieux_MISCELLANEOUS
Abstract: We propose a time-domain multiple sound source localization (SSL) method based on Bayesian inference. This method is specifically designed to run on the stochastic machines (SM) that we are currently developing to perform efficient low-level sensor signal processing with ultra-low power consumption. The proposed SSL method is divided into two main parts. First, a probabilistic model is run on 50 very short time frames (3. 75ms each) of multichannel recorded signals. Second, the results obtained on the different frames are fused to obtain a final localization map. Using the system in a supervised way allows to extract estimated source locations by selecting as many maxima as there are sources in the room. We explain how this method is implemented on a SM. Experiments are presented to illustrate the performance and robustness of the resulting system.
Published: 2019
Full Text: View/download PDF

29. Microelectronics at the heart of the digital society: technological and training challenges

Author: Laurent Fesquet, Olivier Bonnaud, Institut d'Electronique et de Télécommunications de Rennes (IETR), Université de Rennes 1 (UR1), Université de Rennes (UNIV-RENNES)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-SUPELEC-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Institut d'Électronique et des Technologies du numéRique (IETR), Université de Nantes (UN)-Université de Rennes 1 (UR1), Institut National des Sciences Appliquées (INSA)-Université de Rennes (UNIV-RENNES)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Université de Nantes (UN)-Université de Rennes (UR)-Institut National des Sciences Appliquées - Rennes (INSA Rennes), Institut National des Sciences Appliquées (INSA)-Institut National des Sciences Appliquées (INSA)-CentraleSupélec-Centre National de la Recherche Scientifique (CNRS), and Nantes Université (NU)-Université de Rennes 1 (UR1)
Subjects: Computer science, business.industry, Reliability (computer networking), media_common.quotation_subject, Scale (chemistry), 05 social sciences, Context (language use), 02 engineering and technology, Energy consumption, Engineering management, Presentation, 020204 information systems, PACS 85.42, 0502 economics and business, 0202 electrical engineering, electronic engineering, information engineering, Microelectronics, Quality (business), [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, 050203 business & management, ComputingMilieux_MISCELLANEOUS, Efficient energy use, media_common
Abstract: The desire to develop the all-digital society at the global level implies the development of connected objects and the Internet of Things at a large scale. These objects require a physical implementation based on microelectronic devices, circuits and systems. The exponential growth of these objects leads to major needs in all the microelectronic sectors, in terms of basic devices, circuits and systems, which require today to be energy efficient. Many challenges are emerging for designing new low-power techniques that ensure quality, reliability and security. This paper deals on the one hand with the presentation of the context, limitations and potential solutions, and on the other hand with the need for skills that must be taught by adapting the training of specialists to the most advanced technologies.
Published: 2019

30. Learning-Based Reliability Assessment Method for Detection of Permanent Faults in Clockless Circuits

Author: Ricardo Aquino Guazzelli, Rodrigo Possamai Bastos, Matheus Garay Trindade, Laurent Fesquet, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Circuits, Devices and System Integration (CDSI), Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP ), Université Grenoble Alpes (UGA), BEN TITO, Laurence, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: Computer science, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Reliability (computer networking), Hardware_PERFORMANCEANDRELIABILITY, 02 engineering and technology, 01 natural sciences, 0103 physical sciences, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Safety, Risk, Reliability and Quality, ComputingMilieux_MISCELLANEOUS, Electronic circuit, 010302 applied physics, Structure (mathematical logic), Resistive touchscreen, 020208 electrical & electronic engineering, Condensed Matter Physics, Atomic and Molecular Physics, and Optics, Signature (logic), Surfaces, Coatings and Films, Electronic, Optical and Magnetic Materials, Power (physics), PACS 8542, CMOS, Asynchronous communication, PACS 85.42
Abstract: International audience; Permanent faults are a common issue of contemporary CMOS circuits during fabrication and its lifetime. In order to detect these faults, designers adopt logic and delay-oriented testing approaches to validate the circuit's structure. However, for clockless (i.e. asynchronous) circuits, applying well-known testing approaches is not trivial and bring undesirable overheads. To overcome that, the proposed method in this paper leverages the current signature properties of asynchronous circuits to detect permanent resistive-based faults. Through simulation experiments, we show the natural ability of asynchronous circuits in providing useful current signatures for identifying the presence of resistive-based faults. Moreover, the results demonstrate that our testing technique requires no extra circuitry or power ports to detect resistive-short faults = 70k Omega.
Published: 2019
Full Text: View/download PDF

31. Breakdown curves of CH 2 (+) , CH 3 (+) , and CH 4 (+) molecules

Author: IdBarkach, T., Chabot, M., Béroff, K., Della Negra, S., Lesrel, J., Geslin, F., Le Padellec, A., Mahajan, T., Diaz-Tendero, S., Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Institut des Sciences Moléculaires d'Orsay (ISMO), Université Paris-Sud - Paris 11 (UP11)-Centre National de la Recherche Scientifique (CNRS), Institut de Physique Nucléaire d'Orsay (IPNO), Université Paris-Sud - Paris 11 (UP11)-Institut National de Physique Nucléaire et de Physique des Particules du CNRS (IN2P3)-Centre National de la Recherche Scientifique (CNRS), Institut de recherche en astrophysique et planétologie (IRAP), Université Toulouse III - Paul Sabatier (UT3), Université Fédérale Toulouse Midi-Pyrénées-Université Fédérale Toulouse Midi-Pyrénées-Observatoire Midi-Pyrénées (OMP), Université Fédérale Toulouse Midi-Pyrénées-Centre National de la Recherche Scientifique (CNRS), and Laboratoire des collisions atomiques et moléculaires (LCAM)
Subjects: [PHYS]Physics [physics], [PHYS.ASTR]Physics [physics]/Astrophysics [astro-ph], ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2019
Full Text: View/download PDF

32. Design of a 77-GHz LC-VCO With a Slow-Wave Coplanar Stripline-Based Inductor

Author: Sharma, Ekta, Saadi, Abdelhalim, Barragan, Manuel J., Pistono, Emmanuel, Margalef-Rovira, Marc, Barragan, Manuel, Lisboa De Souza, Antonio Augusto, Ferrari, Philippe, Bourdel, Sylvain, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Université Grenoble Alpes (UGA), Systèmes RF (XLIM-SRF), XLIM (XLIM), Université de Limoges (UNILIM)-Centre National de la Recherche Scientifique (CNRS)-Université de Limoges (UNILIM)-Centre National de la Recherche Scientifique (CNRS), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: Computer science, 020208 electrical & electronic engineering, 02 engineering and technology, Inductor, 7. Clean energy, Inductance, Voltage-controlled oscillator, CMOS, Transmission line, Q factor, Limit (music), 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Stripline, ComputingMilieux_MISCELLANEOUS
Abstract: The objective of this paper is to demonstrate that the use of a distributed approach for the design of the inductance of an LC -tank millimeter-wave (mm-wave) voltage-controlled oscillator (VCO) can lead to higher performance. Performance is improved in both frequency tuning range and power consumption thanks to a reduction of the cross-coupled pair size. The direct comparison of VCOs designed in different technologies is not straightforward, since the performance of the varactors and the inductance widely differ for different fabrication technologies. Hence, two VCOs were designed and integrated in the same CMOS 55-nm technology by using the same varactors. A “classical” VCO using an inductor available in the technology and serving as reference, and a distributed-inductance-based VCO using a slow-wave transmission line were considered. A detailed and efficient approach is adopted for the synthesis of slow-wave transmission line-based inductance without using time-consuming EM simulations. The slow-wave VCO permits to limit the overall size linked to a distributed approach while improving the electrical performance. The experimental results on the proof-of-concept demonstrators at a working frequency of 77 GHz allow validating our proposal.
Published: 2019
Full Text: View/download PDF

33. Managing Aging Induced Reliability at Run-time

Author: Lorena Anghel, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and BEN TITO, Laurence
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2019

34. Transverse instability of gravity–capillary solitary waves on deep water in the presence of constant vorticity

Author: H. C. Hsu, Y. Y. Chen, Malek Abid, C. Kharif, Institut de Recherche sur les Phénomènes Hors Equilibre (IRPHE), Aix Marseille Université (AMU)-École Centrale de Marseille (ECM)-Centre National de la Recherche Scientifique (CNRS), National Sun Yat-Sen University (NSYSU), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), UMI GT CNRS, Georgia Institute of Technology [Atlanta]-Centre National de la Recherche Scientifique (CNRS), Ecole Supérieure de Mécanique, and Université de la Méditerranée - Aix-Marseille 2
Subjects: Capillary wave, 01 natural sciences, Instability, 010305 fluids & plasmas, Physics::Fluid Dynamics, 0103 physical sciences, Growth rate, [PHYS.MECA.MEFL]Physics [physics]/Mechanics [physics]/Fluid mechanics [physics.class-ph], gravity-capillary solitary waves, 010306 general physics, transverse instability, Nonlinear Sciences::Pattern Formation and Solitons, Bifurcation, ComputingMilieux_MISCELLANEOUS, vorticity, Physics, NLS equation, [PHYS.MECA.MEFL]Physics [physics]/Mechanics [physics]/Mechanics of the fluids [physics.class-ph], Mechanical Engineering, Mechanics, Vorticity, Condensed Matter Physics, Transverse plane, Mechanics of Materials, Group velocity, Phase velocity
Abstract: International audience; The bifurcation of two-dimensional gravity-capillary waves into solitary waves when the phase velocity and group velocity are nearly equal is investigated in the presence of constant vorticity. We found that gravity-capillary solitary waves with decaying oscillatory tails exist in deep water in the presence of vorticity. Furthermore we found that the presence of vorticity influences strongly (i) the solitary wave properties and (ii) the growth rate of unstable transverse perturbations. The growth rate and bandwidth instability are given numerically and analytically as a function of the vorticity.
Published: 2019
Full Text: View/download PDF

35. Soft Dielectric Generators for energy harvesting and sensors

Author: Sylvestre, Alain, Jean-Mistral, Claire, Basrour, Skandar, Bellet, D., Bai, J., Laboratoire de Génie Electrique de Grenoble (G2ELab), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut Polytechnique de Grenoble - Grenoble Institute of Technology-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Laboratoire de Mécanique des Contacts et des Structures [Villeurbanne] (LaMCoS), Institut National des Sciences Appliquées de Lyon (INSA Lyon), Université de Lyon-Institut National des Sciences Appliquées (INSA)-Université de Lyon-Institut National des Sciences Appliquées (INSA)-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Laboratoire des matériaux et du génie physique (LMGP), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Institut National Polytechnique de Grenoble (INPG), Laboratoire de mécanique des sols, structures et matériaux (MSSMat), Centre National de la Recherche Scientifique (CNRS)-CentraleSupélec, Lmgp, Labo, Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Laboratoire des matériaux et du génie physique (LMGP ), Institut National Polytechnique de Grenoble (INPG)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Institut de Chimie du CNRS (INC)-Centre National de la Recherche Scientifique (CNRS), and CentraleSupélec-Centre National de la Recherche Scientifique (CNRS)
Subjects: [CHIM.MATE] Chemical Sciences/Material chemistry, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, [CHIM.MATE]Chemical Sciences/Material chemistry, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2019

36. Feature selection and feature design for machine learning indirect test: a tutorial review

Author: Manuel J. Barragan, Gildas Leger, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Instituto de Microelectrónica de Sevilla (IMSE-CNM CSIC), and Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Spain] (CSIC)
Subjects: Computer science, Circuit performance, business.industry, 020208 electrical & electronic engineering, Feature selection, 02 engineering and technology, Machine learning, computer.software_genre, 020202 computer hardware & architecture, Feature design, Set (abstract data type), Key point, Indirect test, PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Artificial intelligence, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, computer, ComputingMilieux_MISCELLANEOUS
Abstract: International audience; Machine learning indirect test replaces costly specification measurements by simpler signatures and use modern learning algorithms to map these signatures to specifications. Defining a set of relevant signatures that appropriately captures the circuit performance degradation mechanisms is then a key point for enabling machine learning indirect test. In this tutorial we review some methodologies for selecting and designing such a set of information rich signatures.
Published: 2019
Full Text: View/download PDF

37. Efficient generation of data sets for one-shot statistical calibration of RF/mm-wave circuits

Author: Estelle Lauga-Larroze, Salvador Mir, Gildas Leger, Manuel J. Barragan, Florent Cilici, Sylvain Bourdcl, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC), Laboratoire de Radio-Fréquence et d'Intégration de Circuits (RFIC-Lab), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), European Project: 737454,H2020,H2020-ECSEL-2016-1-RIA-two-stage,TARANTO(2017), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Instituto de Microelectrónica de Sevilla (IMSE-CNM CSIC), Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Spain] (CSIC), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Université Grenoble Alpes (UGA), European Project: 737454,TARANTO, and Universidad de Sevilla / University of Sevilla-Centro Nacional de Microelectronica [Spain] (CNM)-Consejo Superior de Investigaciones Científicas [Madrid] (CSIC)
Subjects: Computer science, Calibration (statistics), 020208 electrical & electronic engineering, Process (computing), Regression analysis, 02 engineering and technology, 020202 computer hardware & architecture, Data set, Set (abstract data type), Variable (computer science), Simple (abstract algebra), PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, Electronic engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS, Electronic circuit
Abstract: International audience; Millimeter-wave circuits in current nanometric technologies are especially sensitive to process variations, which can seriously degrade the device behavior and reduce fabrication yield. To tackle this issue, conservative designs and large design margins are widely used solutions. Another approach consists in introducing variable elements, also called tuning knobs, to allow post-fabrication tuning. One-shot statistical calibration techniques take advantage of advanced machine learning regression tools to propose a set of tuning knobs values that enhance the circuit performance based on simple measurements. Training the regression models require a huge amount of data covering the device performances, the effect of the tuning knobs and the simple measurements that guide the regression. In this work, we propose an efficient method for generating such a data set that reduces noticeably the size of the required training set for an accurate calibration.
Published: 2019
Full Text: View/download PDF

38. Built-In Self-Test solutions for high-performance and reliable analog, mixed-signal, and RF integrated circuits

Author: Barragan, Manuel J., Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Communauté Université Grenoble Alpes, Dominique Dallet, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and Barragan Asian, Manuel Jose
Subjects: Machine Learning, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Feature selection, Built-In Self-Test, Hardware_PERFORMANCEANDRELIABILITY, Apprentissage machine, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Design-for-Test, [SPI.TRON]Engineering Sciences [physics]/Electronics
Abstract: The integration capabilities offered by current nanoscale CMOS technologies enable the fabrication of complete and very complex mixed-signal systems. However, manufacturing processes are prone to imperfections that may degrade –sometimes catastrophically– the intended functionality of the fabricated circuits. Extensive production tests are then needed in order to separate these defective or unreliable parts from functionally correct devices. Unfortunately, the co-integration of blocks of very distinct nature (analog, mixed-signal, digital, RF, ...) as well as the limited access to internal nodes in an integrated system make the test of these devices a very challenging and costly task.BIST techniques have been proposed as a way to overcome these issues. These techniques aim at including some of the ATE functionality into the Device Under Test, in such a way that each fabricated system becomes self-testable. Applying BIST to the digital part of a complex integrated system is a common and standardized practice. Many test alternatives broadly proven in practice are available, all of them based on defect test and fault models. On the other hand, AMS-RF BIST techniques are still lagging behind due to the strict requirements imposed by the analog circuitry.Since AMS-RF circuits are usually tested by measuring their functional specifications, this means that each measurement has to comply with strict accuracy constraints to match the performance of the circuits under test.A promising solution to these issues is the combination of BIST strategies and machine learning-based tests. Machine learning test strategies replace costly analog, mixed-signal and RF performance measurements by a set of simpler measurements that can be performed on-chip by low-cost built-in test circuitry. The core idea is to build a mapping model from a set of simple measurements to the set of functional specifications. However, this test strategy is not free of shortcomings either.My research has been focused on overcoming the limitations of current BIST and machine learning-based test for complex AMS-RF circuits, with the final goal of providing innovative state-of-the-art test solutions for these complex systems
Published: 2019

39. On the Reliability of the Ring Oscillator Physically Unclonable Functions

Author: Osnat Keren, Giorgio Di Natale, Honorio Martin, Elena Ioana Vatajelu, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Faculty of Engineering [Israel], Bar-Ilan University [Israël], Electronics Technology Department, Carlos III University of Madrid. (UC3M), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Electronics Technology Department, Carlos III University of Madrid, Carlos III University of Madrid, and BEN TITO, Laurence
Subjects: Computer science, Oscillation, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, 020206 networking & telecommunications, 02 engineering and technology, Ring oscillator, ComputingMilieux_MANAGEMENTOFCOMPUTINGANDINFORMATIONSYSTEMS, Physics::Plasma Physics, Control theory, PACS 85.42, Metric (mathematics), 0202 electrical engineering, electronic engineering, information engineering, Error correcting, 020201 artificial intelligence & image processing, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, Differential (infinitesimal), Reliability (statistics), Computer Science::Cryptography and Security
Abstract: International audience; In this paper we study the reliability of ring oscillator PUFs. We correlate the reliability with the distance between the measured oscillation frequencies, for different operating conditions. We propose a reliability evaluation metric based on differential frequency threshold, which allows the design of a robust PUF. In addition, we evaluate the characteristics of the resulting PUF and we devise a scenario for guaranteeing the overall reliability by selecting appropriate error correcting codes.
Published: 2019
Full Text: View/download PDF

40. BIST Solutions for Industrial Mixed-signal Circuits

Author: Mir, Salvador, Barragan, Manuel J., Mammasse, M., Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), STMicroelectronics [Crolles] (ST-CROLLES), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), BEN TITO, Laurence, Hierarchy-Aware and secure embedded test infrastructure for Dependability and performance Enhancement of integrated Systems - HADES - - PENTA2017-04-01 - 0000-00-00 - 172930120 - VALID, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: BIST, [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, Hardware_INTEGRATEDCIRCUITS, Hardware_PERFORMANCEANDRELIABILITY, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, analog and mixed-signal test
Abstract: International audience; This talk will describe BIST solutions that have been developed in the last years in the frame of joint development work between TIMA Laboratory and STMicroelectronics. These solutions that are today of industrial application are aimed at ADCs, PLLs and CMOS imagers. They all use fully or mostly digital test circuitry, making them highly portable across different technologies. We will also draw some perspectives on new joint development work for mixed-signal/RF circuits and systems.
Published: 2019

41. HATE: a HArdware Trojan Emulation Environment for Microprocessor-based Systems

Author: Luca Cassano, Andrea Zanetti, Cristiana Bolchini, Giorgio Di Natale, Giampiero Repole, Ivan Montalbano, Politecnico di Milano [Milan] (POLIMI), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: Hardware security module, Emulation, Computer science, business.industry, Supply chain, 0211 other engineering and technologies, 02 engineering and technology, Benchmarking, 020202 computer hardware & architecture, law.invention, Set (abstract data type), Microprocessor, Software, law, Hardware Trojan, Embedded system, PACS 85.42, 0202 electrical engineering, electronic engineering, information engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, ComputingMilieux_MISCELLANEOUS, 021106 design practice & management
Abstract: The constant quest of low production cost and short time-to-market, together with the growing complexity of integrated circuits led to the globalization of the supply chain of silicon devices. One of the threats related to such a supply chain are Hardware Trojan Horses (HWTs), that, in the last years, became a serious issue not only for academy but also for industry. Although a large number of methodologies for HWTs prevention, detection and tolerance have been proposed, there is a lack of well-recognized methods and metrics to evaluate their effectiveness. In this paper we present HATE 1, a HArdware Trojan Emulation Environment. The goal of HATE is twofold: (i) the tool can be used to analyse whether a given HWT (or a given set of HWTs) is activated by a software running on a microprocessor, and (ii) it can be used to assess HWTs detection techniques in microprocessors against a set of generated HWTs (either randomly or not). HATE represents, in our vision, a step towards the definition of a reference benchmarking scenario, to provide a comparative ground for evaluating different proposals focusing on HWT detection/tolerance. A subset of MiBench programs have been used to analyse the efficiency of HATE.1HATE is freely available at http://cassano.faculty.polimi.it/
Published: 2019

42. A Comprehensive Approach to a Trusted Test Infrastructure

Author: Emanuele Valea, Bruno Rouzeyre, Nicolas Valette, Regis Leveugle, Vincent Reynaud, Marc Merandat, Marie-Lise Flottes, Jerome Quevremont, Paolo Maistri, Sophie Dupuis, Giorgio Di Natale, INVIA, THALES, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), TEST (TEST), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), THALES [France], Test and dEpendability of microelectronic integrated SysTems (TEST), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: BIST, Authentication, Test, Computer science, Entry point, Computer security, computer.software_genre, Test (assessment), IEEE 1687, [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Countermeasure, Portfolio, Electronics, Scan chains, computer, Testability, Scan chain encryption
Abstract: International audience; The testability of electronic devices is of critical importance and it is often supported by IEEE standards. The available methods, on the other hand, can be an entry point to a malicious attacker, if no proper countermeasure is adopted. In this paper, we report the latest results from the HADES project, presenting a portfolio of solution towards a secure test infrastructure.
Published: 2019
Full Text: View/download PDF

43. Randomness in emerging technologies: Functional robustness vs. security

Author: Vatajelu, Elena Ioana, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), BEN TITO, Laurence, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics
Abstract: International audience; The rapid development of low power, high density, high performance SoCs has pushed the CMOS devices to their limits and opened the field to the development of emerging technologies. The STT-MRAM and RRAM have emerged as promising choices for embedded memories due to their reduced read/write latency and high CMOS integration capability. Their inner properties make them ideal for implementation of memory blocks (mach and main memory) and, in addition, they are suitable for the implementation of basic security primitives such Physically Unclonable Functions (PUFs) and True Random Number Generators (TRNGs). PUFs are emerging primitives used to implement low-cost device authentication and secure secret key generation. On the other hand, TRNGs generate random numbers from a physical process. This talk will present a survey of today’s and tomorrow’s technologies and explain how it is possible to exploit (i) the high variability affecting the electrical device characteristics to build a robust, unclonable and unpredictable PUF, and (ii) the stochastic characteristics to generate randomly distributed numbers. In addition, it will underline the conflict between functional robustness and security quality of ICs designed with such devices.
Published: 2019

44. Electronic System Level Design of Heterogeneous Systems: a Motor Speed Control System Case Study

Author: Fernandez-Mesa, B.J., Andrade Porras, Liliana Lilibeth, Pétrot, Frédéric, Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), and BEN TITO, Laurence
Subjects: [INFO.INFO-AR]Computer Science [cs]/Hardware Architecture [cs.AR], [INFO.INFO-AR] Computer Science [cs]/Hardware Architecture [cs.AR], Virtual Prototyping, SystemC-AMS, QEMU, PACS 85.42, SystemC, TLM, Hardware_REGISTER-TRANSFER-LEVELIMPLEMENTATION
Abstract: International audience; Although SystemC and its AMS extensions are widely promoted for the design of heterogeneous systems, very few complete cases studies are actually available. In this work, we present a digital and an analog version of a motor speed controller, and detail various modeling approaches. In the digital version, the executable specification is refined to a TLM virtual prototype that runs SW code on a QEMU emulated RISC-V, to study the effect of HW/SW design decisions on the physical system dynamics. In the analog version, the controller equation is mapped to a SystemC AMS model and refined from the discrete- time to the continuous-time domain. By simulating this system, we illustrate the effectiveness of SystemC and SystemC AMS for heterogeneous design space exploration. The example is available at https://gricad-gitlab.univ-grenoble-alpes.fr/tima/public/newcas2019
Published: 2019

45. Encryption Techniques for Test Infrastructures

Author: Valea, Emanuele, Flottes, Marie-Lise, Di Natale, Giorgio, Rouzeyre, Bruno, TEST (TEST), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA)
Subjects: [INFO.INFO-CR]Computer Science [cs]/Cryptography and Security [cs.CR], Test data encryption, Test and Security, Stream cipher, Hardware_PERFORMANCEANDRELIABILITY, Block cipher
Abstract: National audience; Test infrastructures are widely deployed in modern Systems-on-Chip (SoC). They allow the tester to control and observe the internal state of the SoC. However, a malicious user can exploit these infrastructures in order to extract secret information stored inside the SoC. In this paper, we review and compare security countermeasures based on the encryption of test data. The present techniques ensure the confidentiality of the exchanged messages between the circuit and the tester. Moreover, they provide lightweight user authentication in order to prevent malicious users from accessing the test infrastructure.
Published: 2019

46. Compact Analog All-Pass Phase-Shifter in 65-nm CMOS for 24/28 GHz on-Chip-and in-Package Phased-Array Antenna

Author: Marcos Lajovic Carneiro, Philippe Ferrari, André Pérennec, Marc Le Roy, Vincent Puyal, Raafat Lababidi, Lab-STICC_UBO_MOM_DIM, Laboratoire des sciences et techniques de l'information, de la communication et de la connaissance (Lab-STICC), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), Lab-STICC_ENSTAB_MOM_DIM, École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique Bretagne-Pays de la Loire (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), University of Grenoble Alpes, France, Commissariat à l'énergie atomique et aux énergies alternatives - Laboratoire d'Electronique et de Technologie de l'Information (CEA-LETI), Direction de Recherche Technologique (CEA) (DRT (CEA)), Commissariat à l'énergie atomique et aux énergies alternatives (CEA)-Commissariat à l'énergie atomique et aux énergies alternatives (CEA), Conseil Départemental du finistère, CD29, Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université européenne de Bretagne - European University of Brittany (UEB)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-Télécom Bretagne-Institut Brestois du Numérique et des Mathématiques (IBNM), Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS), École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Institut Mines-Télécom [Paris] (IMT)-École Nationale d'Ingénieurs de Brest (ENIB)-Université de Bretagne Sud (UBS)-Université de Brest (UBO)-École Nationale Supérieure de Techniques Avancées Bretagne (ENSTA Bretagne)-Institut Mines-Télécom [Paris] (IMT)-Centre National de la Recherche Scientifique (CNRS)-Université Bretagne Loire (UBL)-IMT Atlantique (IMT Atlantique), Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Laboratoire d'Electronique et des Technologies de l'Information (CEA-LETI), and Université Grenoble Alpes (UGA)-Direction de Recherche Technologique (CEA) (DRT (CEA))
Subjects: Materials science, phase shifter, 65-nm CMOS, Phased array, Phased-array antenna, Hardware_PERFORMANCEANDRELIABILITY, 7. Clean energy, Capacitance, Microstrip, 03 medical and health sciences, 0302 clinical medicine, In-Package antenna, Hardware_INTEGRATEDCIRCUITS, Insertion loss, Wide band, varactors, 030222 orthopedics, wide band, business.industry, Bandwidth (signal processing), Compact, On-Chip antenna, C-ACTI, [SPI.TRON]Engineering Sciences [physics]/Electronics, CMOS, Optoelectronics, Déphaseur, business, Analog phase shifter, Phase shift module, 030217 neurology & neurosurgery, Hardware_LOGICDESIGN
Abstract: International audience; This paper describes the synthesis method and implementation in 65-nm CMOS technology of a compact analog phase-shifter (PS) dedicated to 24/28 GHz applications. This PS delivers a phase shift continuously tunable from 0 to 55° and is particularly suited for on-chip or in-package phased-array antenna. The proposed topology, which is based on an all-pass circuit that includes coupled microstrip lines and varactors as tunable components is intrinsically compact and shows an interesting phase-range vs capacitance-variation ratio.
Published: 2019

47. Embedded Hardware Architectures for AI

Author: Lorena Anghel, Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), and BEN TITO, Laurence
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: International audience
Published: 2019

48. Static linearity test of SAR ADCs using an embedded incremental Σ∆ converter

Author: Silveira Feitoza, R., Barragan, Manuel J., Dzahini, D., Mir, S., Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019]), European Project: 172930120,PENTA,RECHADESTIMD,HADES(2017), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), BEN TITO, Laurence, and Hierarchy-Aware and secure embedded test infrastructure for Dependability and performance Enhancement of integrated Systems - HADES - - PENTA2017-04-01 - 0000-00-00 - 172930120 - VALID
Subjects: [SPI.NANO] Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, PACS 85.42, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, ComputingMilieux_MISCELLANEOUS
Abstract: National audience
Published: 2019

49. A Survey on Security Threats and Countermeasures in IEEE Test Standards

Author: Giorgio Di Natale, Emanuele Valea, Mathieu Da Silva, Bruno Rouzeyre, Marie-Lise Flottes, TEST (TEST), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: Hardware security module, Computer science, business.industry, 02 engineering and technology, Computer security, computer.software_genre, Encryption, Test Standards, 020202 computer hardware & architecture, Test (assessment), ComputingMilieux_MANAGEMENTOFCOMPUTINGANDINFORMATIONSYSTEMS, PACS 8542, Hardware and Architecture, 0202 electrical engineering, electronic engineering, information engineering, Hardware Security, Electrical and Electronic Engineering, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, business, computer, Testing vs Security, Software, Hacker
Abstract: International audience; The growth in complexity of Integrated Circuits (IC) is supported, amongst other factors, by the development of standardized test infrastructures. The feasibility of both end-ofmanufacturing and in-field tests heavily depends on the presence of these infrastructures that give detailed access to the IC. The standard test infrastructures are referred as IEEE Std. 1149.1 (JTAG), IEEE Std. 1500 and IEEE Std. 1687 (IJTAG). The security issues arising from the presence of these infrastructures have been fully exposed in the last two decades. This led to the publication of several practical attacks showing how a non-protected test infrastructure can end into the jeopardizing of the entire system. As a consequence, many countermeasures have been proposed. In this survey, we provide: (i) a taxonomy of the attacks that can be performed exploiting the standard test infrastructures; (ii) a taxonomy of countermeasures inspired by the kind of security primitives that are granted in each case.
Published: 2019
Full Text: View/download PDF

50. Stream Cipher Based Encryption in IEEE Test Standards

Author: Valea, Emanuele, Flottes, Marie-Lise, Di Natale, Giorgio, Rouzeyre, Bruno, TEST (TEST), Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier (LIRMM), Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS), Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA), Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Université Joseph Fourier - Grenoble 1 (UJF)-Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP)-Institut National Polytechnique de Grenoble (INPG)-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes (UGA), Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM)-Centre National de la Recherche Scientifique (CNRS)-Université de Montpellier (UM), Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés (TIMA), and Institut polytechnique de Grenoble - Grenoble Institute of Technology (Grenoble INP )-Centre National de la Recherche Scientifique (CNRS)-Université Grenoble Alpes [2016-2019] (UGA [2016-2019])
Subjects: PACS 85.42, Stream cipher, [SPI.NANO]Engineering Sciences [physics]/Micro and nanotechnologies/Microelectronics, JTAG, Scan encryption, ComputingMilieux_MISCELLANEOUS, Test vs security
Abstract: International audience; IEEE test standards have been developed in order to sustain the deployment of complex test infrastructures inside modern Integrated Circuits (IC). Security is a primary issue in test infrastructures. For instance, confidentiality of sensitive data flowing through the test infrastructure must be ensured. User authentication is also crucial in order to avoid secret stealing and/or device corruption. In this paper, we propose a secure JTAG implementation, based on stream cipher encryption. This countermeasure provides data confidentiality and lightweight user authentication at the cost of a little area overhead on the whole IC.
Published: 2019

Catalog

Books, media, physical & digital resources

See catalog results

Searchworks

Select search scope, currently: Articles Catalog books, media & more in Jio Institute collections Articles journal articles & other e-resources

Search

Search Constraints

Refine your results

Search Limiters

Topic

Publication Year Range

Language

Publication Type

Journal

Database

Publisher

577 results on '"Techniques of Informatics and Microelectronics for integrated systems Architecture (TIMA) '

Search Results

Catalog

Select search scope, currently: Articles

Catalog

books, media & more in Jio Institute collections

Articles

journal articles & other e-resources