48 results on '"Rooyackers, R."'
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2. Ultra High Voltage Electron Microscopy Study of {113}-Defect Generation in Si Nanowires
3. Evaluation of Triple-Gate FinFETS with High-k Dielectrics and TiN Gate Materials Under Analog Operation
4. Low Temperature Operation of Undoped Body Triple-Gate FinFETs from an Analog Perspective
5. Comparison between proton irradiated triple gate SOI TFETS and finfets from a TID point of view
6. First demonstration of similar to 3500 cm(2)/V-s electron mobility and sufficient BTI reliability (max V-ov up to 0.6V) In0.53Ga0.47As nFET using an IL/LaSiOx/HfO2 gate stack
7. Performance of differential pair circuits designed with line tunnel FET devices at different temperatures.
8. Performance of differential pair circuits designed with line tunnel FET devices at different temperatures
9. Opposite trends between digital and analog performance for different TFET technologies
10. The impact of the temperature on In0.53Ga0.47As nTFETs
11. Record performance Top-down In0.53Ga0.47As vertical nanowire FETs and vertical nanosheets
12. Experimental analysis of differential pairs designed with line tunnel FET devices
13. Impact of the Zn diffusion process at the source side of InxGa1−xAs nTFETs on the analog parameters down to 10 K
14. Proton radiation effects on the self-aligned triple gate SOI p-type tunnel FET output characteristic
15. First demonstration of ∼3500 cm2/V-s electron mobility and sufficient BTI reliability (max Vov up to 0.6V) In0.53Ga0.47As nFET using an IL/LaSiOx/HfO2 gate stack
16. Analysis of current mirror circuits designed with line tunnel FET devices at different temperatures
17. Analysis of the transistor efficiency of gas phase Zn diffusion In0.53Ga0.47As nTFETs at different temperatures
18. A New Direction for III–V FETs for Mobile CPU Operation Including Burst-Mode: In0.35Ga0.65As Channel
19. InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature
20. The Smaller the Noisier? Low Frequency Noise Diagnostics of Advanced Semiconductor Devices
21. Analog parameters of solid source Zn diffusion InXGa1−XAs nTFETs down to 10 K
22. Impact of InxGa1−x composition and source Zn diffusion temperature on intrinsic voltage gain in InGaAs TFETs
23. Top-down InGaAs nanowire and fin vertical FETs with record performance
24. Record mobility (μeff ∼3100 cm2/V-s) and reliability performance (Vov∼0.5V for 10yr operation) of In0.53Ga0.47As MOS devices using improved surface preparation and a novel interfacial layer
25. Beyond-Si materials and devices for more Moore and more than Moore applications
26. Performance of TFET and FinFET devices applied to current mirrors for different dimensions and temperatures
27. Comparative study of vertical GAA TFETs and GAA MOSFETs in function of the inversion coefficient
28. Intrinsic voltage gain of Line-TFETs and comparison with other TFET and MOSFET architectures
29. Influence of the Ge amount at source on transistor efficiency of vertical gate all around TFET for different conduction regimes
30. Total ionizing dose influence on proton irradiated triple gate SOI Tunnel FETs.
31. Analysis of analog parameters in NW-TFETs with Si and SiGe source composition at high temperatures
32. Staggered band gap n+In0.5Ga0.5As/p+GaAs0.5Sb0.5 Esaki diode investigations for TFET device predictions
33. The smaller the noisier? Low frequency noise diagnostics of advanced semiconductor devices
34. Study of Hysteresis in Vertical Ge-Source Heterojunction Tunnel-FETs at Low Temperature
35. Comparison of Current Mirrors Designed with TFET or FinFET Devices for Different Dimensions and Temperatures
36. Impact of dopants and silicon structure dimensions on {113}‐defect formation during 2 MeV electron irradiation in an UHVEM
37. (Invited) Monolithic Integration of III-V Semiconductors by Selective Area Growth on Si(001) Substrate: Epitaxy Challenges & Applications
38. In situ UHVEM irradiation study of intrinsic point defect behavior in Si nanowire structures
39. Comparison between vertical silicon NW-TFET and NW-MOSFETfrom analog point of view
40. Study of low frequency noise in vertical NW-Tunnel FETs with different source compositions
41. Impact of the diameter of vertical nanowire-tunnel FETs with Si and SiGe source composition on analog parameters
42. Perspective of tunnel-FET for future low-power technology nodes
43. Analysis of analog parameters in NW-TFETs with Si and SiGe source composition at high temperatures.
44. The smaller the noisier? Low frequency noise diagnostics of advanced semiconductor devices.
45. Impact of dopants and silicon structure dimensions on {113}-defect formation during 2 MeV electron irradiation in an UHVEM.
46. In situ UHVEM irradiation study of intrinsic point defect behavior in Si nanowire structures.
47. Transconductance hump in vertical gate-all-around tunnel-FETs.
48. (Invited) Monolithic Integration of III-V Semiconductors by Selective Area Growth on Si(001) Substrate: Epitaxy Challenges & Applications
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