Search

Background: Fetal and neonatal mortality serves as the most sensitive index of maternal and neonatal care. Congenital malformations remain a common cause of perinatal deaths and account for 10–15% in developing countries. Antenatal anomaly scan has become a standard element of obstetric care and their time for a fetal malformation is about 18 weeks. Fetal autopsy serves as a methodology to confirm the sonogram findings with regard to fetal anomalies. Aims and Objectives: The aim of our present study is to review and evaluate fetal autopsy of stillbirth/fetal losses and to confirm the malformations that were diagnosed by ultrasound. Materials and Methods: A cross-sectional study of a total of 10 cases received during the period of September 2023–October 2023 at the Institute of Obstetrics and Gynaecology. All the cases were spontaneous fetal losses. A standard protocol of autopsy procedure was followed which included external, internal, and histopathological examination. In fetuses with prenatally diagnosed malformations, ultrasound findings were compared with autopsy findings. Results: We analyzed a total of 10 fetuses, which included one chromosomal abnormality, four cardiac anomalies, one multiple anomaly, three central nervous system (CNS) anomalies, and one lethal skeletal dysplasia. The fetal autopsy confirmed the prenatal ultrasound findings in eight cases. Fetuses with CNS abnormality were not appreciated grossly due to early autolysis of the brain in the post-mortem. Conclusion: Prenatal imaging and screening are considered milestone development which detects fetal anomalies. However, the time-tested clinical autopsy which used to be conducted for all hospital deaths to find the cause of death was the norm of yesteryears which threw light on many unidentified causes and many syndromic associations not detected antemortem. Likewise, this case highlights the importance of autopsy correlation with prenatal imaging to highlight the same findings and to detect findings not picked up during imaging.

Low power techniques are becoming more important as portable digital applications expand quickly and demand high speed and low power consumption. The ALU is the most crucial and essential component of a central processing unit, as well as numerous embedded systems and microprocessors. Designing a 32-bit ALU that combines an arithmetic unit and a logical unit is the task at hand. The logic unit will do logic operations AND, OR, XOR, and XNOR with the aid of the recommended CMOS technology, while the arithmetic unit will do the arithmetic operations addition, subtraction, increment, and buffering operation. The arithmetic unit is constructed using the 4x1 MUX, 2x1 MUX, and full adder, and the 4x1 MUX, required logic gates, and 4x1 MUX are employed to create the logical unit. Using Cadence Virtuoso Gpdk 180nm Technology, the results of the simulation of the 32-bit ALU, the ideal delay, and the Power were calculated.

Mathematics teachers, are always making and remaking their curricula to better serve the needs of their students. Sometimes, these revisions happen while they are teaching a new task. At other times, as they grow in their thinking, they become aware that some of the tasks they've used for years--and might even name as favorites for their potential to be mathematically productive for students--are problematic in nature. They may become aware of how the context is outdated, offensive, or just irrelevant to their students' lived experiences. Regardless of whether the task is one they have used multiple times or just once, they need a way to revise tasks to mitigate the harm inflicted by the context, while keeping the content relevant to the learning goal. In this article, the authors share a framework for how they have altered tasks in an effort to continually improve their teaching practice and better support our students.

In this work, we build upon an implementation of a peer-to-peer image encryption algorithm: “Rubik’s cube algorithm”. The algorithm utilizes pixel-level scrambling and XOR-based diffusion, facilitated through the symmetric key. Empirical analysis has proven this algorithm to have the advantage of large key space, high-level security, high obscurity level, and high speed, aiding in secure image transmission over insecure channels. However, the base approach has drawbacks of key generation being handled client-side (at nodes) and the process is time-consuming due to dynamically generating keys. Our work solves these issues by introducing a Key Distribution Center (KDC) to distribute symmetric keys for transmission, increasing confidentiality, and reducing key-generation overhead on nodes. Three approaches utilizing the KDC are presented, communicating the dimensions with KDC to generate keys, standardizing any image to fixed dimensions to standardize key-generation, and lastly, using a single session key which is cyclically iterated over, emulating different dimensions.

Over the past two decades, the landscape of research on mathematics teacher educators (MTEs) has grown considerably. One particular area of interest has focused on MTE knowledge and the ways in which it is developed and used in teaching practice. However, studies have conceptualized MTE knowledge in different ways and have employed considerably different methodologies and approaches to its study. In an effort to understand this varied landscape, we conducted an extensive review of research on the nature and development of MTE knowledge. This review provides a broad descriptive analysis of the existing theoretical and empirical research on MTEs’ knowledge, explores the theoretical underpinnings of the existing frameworks for and studies on MTE knowledge, and considers implications for future research.