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Intra‐mode decision plays an important role in the new high‐efficiency video coding (HEVC) video compression standard. The higher number of intra‐modes in HEVC standard increased the computational complexity and encoding time significantly. To reduce the encoding time with as low effect as possible on the coding quality, a new algorithm based on the texture of the block diagonals is proposed. The proposed algorithm is used to reduce the number of calculations observed in the original standard. The results show that the proposed algorithm can show variety of solutions with wide range of encoding time reduction and BD rate increment. The solution with the highest time saving within an acceptable BD rate increment shows 40.85% time saving and 1.75% BD rate increment. With different parameters settings, BD rate increments with as low as 0.78% can be achieved while having 33.38% time saving. [ABSTRACT FROM AUTHOR]

In High Efficiency Video Coding (HEVC) standard, higher video resolutions employ larger integer Discrete Cosine Transform (DCT)/inverse DCT (IDCT) block sizes. In this study, the authors propose two high‐throughput unified DCT/IDCT architectures. The proposed architectures can process variable DCT/IDCT block sizes according to the HEVC standard. The proposed architectures were prototyped on TSMC 65 nm CMOS technology. The prototyping results show that the two unified architectures have throughput of 15.24 and 16.03 Gsps, respectively, and they can encode video sequences with resolutions up to 8 K at 120 fps and decode the same resolution at 240 fps using only one circuit for both DCT and IDCT. [ABSTRACT FROM AUTHOR]