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In the field of silicon photonics, highly compact and miniature high‐density circuits are achieved by precisely shaping millimeter‐long waveguides into spiral configurations. Organic photonics, on the other hand, takes advantage of mechanically flexible crystal spiral waveguides (SWs) within organic photonic circuits. These SWs offer versatility, enabling precise control over light paths and mechanical programmability. This study introduces an innovative pick‐and‐place technique for constructing various organic spiral waveguides (OSWs) with different geometries, such as Cornu, Archimedean, elliptical, rectangular, four‐sided polygons, and three‐sided polygons. Additionally, this method allows for the creation of optically reprogrammable photonic circuits. Custom‐synthesized flexible crystals are used, including blue‐emitting (Z)−3‐(4‐(9H‐carbazol‐9‐yl)phenyl)−2‐(3,5‐bis(trifluoromethyl)phenyl)acrylonitrile (Cz‐2CF3), green‐emitting (E)−1‐(((5‐bromopyridin‐2‐yl)imino)methyl)naphthalene‐2‐ol (BPyIN), cyan‐emitting 9,10‐dibromo anthracene (DBA), and red‐emitting 4,7‐bis(4‐octylthiophen‐2‐yl)benzo[c][1,2,5]thiadiazole (BTD). Systematically integrating a Cz‐2CF3 OSW (with two ports for optical signal routing in clockwise/counterclockwise directions) with DBA and BTD waveguides produces multi‐color hybrid photonic circuits with customizable optical functions, tailored to specific design needs. The number of output ports can be dynamically adjusted through mechanical programming by coupling crystals tip‐to‐tip when replacing the DBA waveguide with a BPyIN waveguide using the pick‐and‐place technology. This mechanically programmable hybrid spiral photonic circuit seamlessly operates across the entire visible spectral bandwidth, making it valuable for various applications, including high‐fidelity sensing, spectrometer components, and intelligent circuitry. [ABSTRACT FROM AUTHOR]

Photonic circuits attract much attention as promising candidates to overcome the drawbacks of their electronic counterparts. By utilizing the broad bandwidth and low energy consumption of optical communication, hybrid circuits can provide a comprehensive platform for the era beyond Moore's law. In particular, parallel matrix operations, the heavy lifting behind neural networks, remain challenging for traditional electronics due to high heat dissipation. To enable these parallel computations optically, (de‐)multiplexing is crucial to address the different channels. Previously this has been accomplished with complex spectral or time encodings in wave division or time division methods. However, herein, a simple method to address parallel optical channels exclusively with 2‐bit signals is presented. By using PEDOT:PSS as electrochromic material for intensity modulation, light transmission or absorption is controlled by oxidation and reduction with an electrolyte. Y‐branch structures are used to design the multiplexing layout and to assign the 2‐bit states to the channels. This binary addressable optical multiplexer, therefore, combines optical communication with electronic signals into a hybrid circuit. [ABSTRACT FROM AUTHOR]

A multilayer, ultra‐wideband absorber is proposed in this paper, which consists of a hybrid circuit analog absorber and a metal resonant absorber. The circuit analog absorber is located at the upper part of the absorber to absorb low‐frequency electromagnetic waves, and the metal resonant absorber is located at the bottom of the absorber to absorb high‐frequency electromagnetic waves and provide a reflecting plate for the absorber. Through simulation, the absorption rate of the designed absorber can be greater than 90% in the range of 2.33–18.43 GHz, and an equivalent circuit is established for verification. In addition, the absorber has good angular stability and polarization insensitivity. The prototype of the absorber was manufactured and measured, and the test results are basically consistent with the analysis results. [ABSTRACT FROM AUTHOR]

Multi‐terminal flexible DC power grid plays an important role in large‐scale new energy integration, which usually requires the installation of multi‐terminal DC circuit breaker (MTCB) at the intersection of multiple DC lines. At present, the research on multi‐terminal DC circuit breaker is mostly limited to theoretical simulation calculation, and there are few experimental studies and engineering applications. In this paper, a four‐terminal DC circuit breaker based on commutating path multiplexing is proposed, which combines with the compact natural commutation scheme of hybrid gap, greatly reducing the cost and volume of the circuit breaker. The commutation characteristics of the four‐terminal hybrid DC circuit breaker equivalent prototype at 10‐kV voltage level were tested. On this basis, the equivalent prototype of the circuit breaker test results shows that under 10‐kV voltage level, the four‐terminal circuit breaker topology can achieve breaking of 11 kA in 2.8 ms by the natural commutation method. [ABSTRACT FROM AUTHOR]

Summary: This work proposes a link training based half‐rate dynamic current‐steering echo‐cancellation hybrid circuit topology for full‐duplex signaling that performs echo cancellation by deploying a bit error detection unit and backchannel adaptation. In addition, this work proposes a power‐efficient half‐rate dynamic current‐steering logic hybrid circuit for full‐duplex signaling over on‐chip interconnects for simultaneous transmission and reception. The half‐rate dynamic current‐steering hybrid circuit topology has low static power consumption compared with traditional current‐mode circuit topology implementations, thanks to the discrete nature of the current‐steering hybrid topology. The proposed scheme is implemented in 1.2 V, 65‐nm complementary metal‐oxide semiconductor (CMOS). The performance results show that the link training scheme sets the control bits for both the transmitter driver and hybrid circuit topology when the backchannel adaptation loop gets locked for 1‐ and 3‐mm interconnects for process, voltage, and temperature (PVT) variations. The proposed hybrid circuit topology is able to receive the required far‐end transmitted data with the link training scheme and has the differential recovered received signal voltage swing of 1.2 V for both 1‐ and 3‐mm interconnect at the 10‐Gb/s data rate. The total power consumption of the hybrid is 3 and 3.5 mW for 1‐ and 3‐mm interconnect with an energy efficiency of 0.6 and 0.7 pJ/bit, respectively, at 10‐Gb/s full‐duplex operation. [ABSTRACT FROM AUTHOR]

Fluorescent plastically bendable crystals are a promising alternative to silicon‐based materials for fabricating photonic integrated circuits, owing to their optical attributes and mechanical compliance. Mechanically bendable plastic organic crystals are rare. Their formation requires anisotropic intermolecular interactions and slip planes in the crystal lattice. This work presents three fluorescent plastically bendable crystalline materials namely, 2‐((E)‐(6‐methylpyridin‐2‐ylimino)methyl)‐4‐chlorophenol (SB1), 2‐((E)‐(6‐methylpyridin‐2‐ylimino)methyl)‐4‐bromophenol (SB2), and 2‐((E)‐(6‐Bromopyridin‐2‐ylimino)methyl)‐4‐bromophenol (SB3) molecules. The crystal plasticity in response to mechanical stress facilitates the fabrication of various monolithic and hybrid (with a tip‐to‐tip coupling) photonic circuits using mechanical micromanipulation with an atomic force microscope cantilever tip. These plastically bendable crystals act as active (self‐guiding of fluorescence) and passive waveguides both in straight and extremely bent (U‐, J‐, and O‐shaped) geometries. These microcircuits use active and passive waveguiding principles and reabsorbance and energy‐transfer mechanisms for their operation, allowing input‐selective and direction‐specific signal transduction. [ABSTRACT FROM AUTHOR]

The high‐voltage direct current (HVDC) power transmission short‐circuit fault protection is a big challenge, and it is the main obstacle to promote the HVDC multi‐terminal networks. A natural commutation current topology (NCCT) of hybrid HVDC circuit breaker (DCCB) integrated with limiting fault current is proposed in this paper, which shares several obvious merits, such as lower peak fault current, shorter fault isolation time and low turn‐off loss. The main contributions in this paper are made as follows. (1). A second‐order RLC circuit in novel NCCT circuit breaker is utilized as the current limiting circuit to dramatically reduce the fault current rising slope and its peak value. (2) A asynchronous NCCT circuit breaker has been investigated to broaden the proposed NCCT circuit breaker's optimal working area. (3) By taking China Zhangbei 500 kV four‐terminal DC grid as an example, an optimization design technique of the asynchronous NCCT‐DCCB is developed to demonstrate the process of the theoretical analysis and parameter design. The correctness of the proposed NCCT‐DCCB and the feasibility of the optimization design technique are confirmed by EMT simulation on PSCAD/EMTDC and hardware‐in‐loop experiment on PLECS‐RtBox. [ABSTRACT FROM AUTHOR]

Hybrid energy storage systems are widely used in electric vehicles and other fields. Focused on the problem of lithium‐ion battery life attenuation caused by high‐frequency components in load power requirements, a closed‐loop Haar wavelet power splitting method is proposed. First, the circuit structure of the hybrid energy storage system is introduced. Then, based on the analysis of the Haar wavelet transform, the Haar wavelet power splitting method, and closed‐loop control algorithm are proposed. On one hand, the Haar wavelet power splitting method is responsible for allocate the high‐frequency and low‐frequency components of the power demand to ultra‐capacitor and lithium‐ion battery, respectively; on the other hand, a closed‐loop controller is proposed to regulate the output current of the lithium‐ion battery dynamically to maintain the stability of the DC bus voltage. Finally, experiments were conducted under CLTC‐P driving cycle. The experimental results show that the proposed closed‐loop Haar wavelet power splitting method can control the maximum deviation of DC bus voltage within 1.28%, while effectively avoiding the impact of high‐frequency components on the life of lithium‐ion batteries. © 2022 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC. [ABSTRACT FROM AUTHOR]

Summary: This work proposes a power‐efficient half‐rate current‐integrating logic (CIL) echo cancelation hybrid circuit topology for full‐duplex communication for off‐chip interconnects in 65 nm CMOS. The proposed hybrid topology has a low power consumption compared to traditional current‐mode hybrid circuit topology implementations, thanks to the CIL hybrid topology with sample and hold front‐end. The post‐layout performance of the half‐rate CIL hybrid includes package parasitic has a differential received signal voltage swing of 190 mV at 10 Gb/s data rate with a timing jitter of 16 ps over a 20 cm FR4 PCB interconnect. The total power consumption of the half‐rate CIL hybrid is only 2 mW, and its energy efficiency is 0.4 pJ/bit. The layout of the hybrid occupies an area of 0.0008 mm2. [ABSTRACT FROM AUTHOR]

Power flow controllers and DC circuit breakers are compulsory components in a multi‐terminal DC grid with overhead lines. They are both composed of similar power electronic devices and thus can be reasonably combined together to realize cost savings. This paper proposes a multi‐port circuit breaker integrated with a multi‐port power flow controller (M‐PFCHCB). The topology structure, operation principles, control strategy and parameter configuration are illustrated in detail. The main breakers are composed of unidirectional power electronic switches, and the selection branch is based on two diode strings, which can significantly save the investment of the breaker. The proposed M‐PFCHCB is able to deal with the fault isolation and the ultra‐fast disconnector failure with high performance. Besides, the power flow of multiple lines can be simultaneously regulated by the M‐PFCHCB without any external power supply. The internal power balance is achieved by controlling the AC circulating current inside the M‐PFCHCB. The simulations conducted on PSCAD in a five‐terminal DC grid with eight DC lines verify the feasibility of the proposed M‐PFCHCB. The technical and economic analysis performed proves that the proposed M‐PFCHCB can achieve the comprehensive functions of fault isolation and power flow control with low construction cost. [ABSTRACT FROM AUTHOR]

Liquid‐metal (LM)‐based soft and stretchable electronics (SSEs) provide unique advantages for wearable computing, soft robotics, and implantable devices applications involving physical interaction with biological tissues and delicate objects. However, the lack of scalable manufacturing techniques prevents their mainstream adoption and commercialization. This paper introduces a scalable and reproducible manufacturing technique for wafer‐level fabrication of LM‐based SSEs, including LM‐only devices and hybrid circuits with LM and solid‐state microelectronics. The approach combines selective metal‐alloy wetting (SMAW) and controlled dip‐coating of eutectic gallium‐indium (EGaIn). The alloying of EGaIn and metal enables depositing EGaIn selectively onto the circuit layout defined by lithographically patterned copper traces on elastomer‐coated wafers. An automated, wafer‐level dip‐coating (DC) approach is developed to enable controllable and reproducible deposition of EGaIn. Wafer‐level simultaneous fabrication of many LM capacitors is demonstrated, and their geometric and electrical reproducibility is evaluated. The results indicate that the SMAW‐DC process can fabricate LM circuits reproducibly and rapidly. Hybrid SSEs are demonstrated by fabricating multiple wearable patches of ultra‐high frequency circuits with an LM dipole antenna, an LM strain gauge, and a solid‐state temperature sensor. Importantly, the presented technique can be integrated into the standard microfabrication flow for microelectronics, ensuring a high level of scalability. [ABSTRACT FROM AUTHOR]

This paper proposes a ± 535 kV hybrid high voltage direct current (HVDC) circuit breaker. In this paper, the interruption processes of the main branch, transferring branch, and MOV (metal oxide varistors) branch are studied by PSCAD/EMTDC computer simulation. Simulation results indicate that an insulated gate bipolar transistor (IGBT) in the main branch will withstand the highest electrical stress (3305 V/2200 A) and the IGBT in the transferring branch will withstand the highest voltage stress (3327 V). Finally, the ± 535 kV hybrid HVDC circuit breaker prototype is manufactured; the test is carried out. Test results suggest that the ± 535 kV hybrid HVDC circuit breaker prototype developed for the Zhangbei four‐terminal voltage source converter (VSC)‐HVDC project can interrupt a ± 25 kA (high current) within 2.84 ms. The simulation results agreed very well with the actual test results of our novel ± 535 kV hybrid HVDC circuit breaker. The novel ± 535 kV hybrid HVDC circuit breaker functioned exceptionally well in achieving fast short‐circuit current isolation. [ABSTRACT FROM AUTHOR]

Series multi‐break mechanical switch is one of the critical components of high‐voltage hybrid DC circuit breakers. However, due to the existence of distributed capacitance, the voltage distribution between the breaks is not balanced. This paper proposed a voltage sharing configuration method of the mechanical switch of hybrid DC circuit breaker, and carried out the static DC voltage and the transient voltage distribution characteristics tests to verify its effectiveness. Considering the influence of whole structure of the circuit breaker, this paper established the electrostatic field model and circuit simulation model of a typical ±535‐kV hybrid DC circuit breaker. And it analyzed the influence of single break's opening fault, breaking open distance, and the shielding fitting on the voltage distribution characteristics of series six break mechanical switch. According to the simulation results based on the Zhangbei voltage source converter‐based high‐voltage direct current project type test parameters, the parameters design of the voltage sharing components of the mechanical switch are obtained, which can meet the voltage sharing coefficient requirement of 95%. [ABSTRACT FROM AUTHOR]

Hybrid direct current circuit breakers (DCCBs) have become prominent because of their low on‐state power dissipation and small arc erosion compared with conventional semiconductor and mechanical circuit breakers (CBs). After a fault occurs in a DC circuit, the current commutates from the mechanical contacts to the semiconductor devices of the hybrid DCCB, and finally, the current is interrupted by the semiconductor devices. Thus, a low turn‐on voltage or a low on‐state resistance of the devices is needed to reduce the commutation time and power dissipation of the current interruption. This paper presents a comparison of DCCB performances metrics, such as the maximum interruption current, power dissipation, and junction temperature, using a silicon carbide metal‐oxide‐field‐effect transistor (SiC‐MOSFET) and silicon insulated‐gate‐bipolar transistor (Si‐IGBT) module. An interruption of 1.1 kA was achieved in 4.3 ms using the SiC‐MOSFET module of which rated current was 444 A. The junction temperature after the interruption was determined to be 275°C, which exceeded the maximum junction temperature of 175°C. In the case of the Si‐IGBT module of which rated current was 1110 A, the maximum interrupting current was limited to 900 A; however, the maximum junction temperature was 41°C. © 2022 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC. [ABSTRACT FROM AUTHOR]

Multi‐port hybrid DC circuit breakers (MP‐HCBs) are rapidly developing due to their obvious advantages in economy compared to traditional two‐port hybrid circuit breakers (HCBs). However, most of the existing MP‐HCB topologies do not have the current‐limiting capability, and a large number of insulated‐gate bipolar transistors (IGBTs) are still needed in their main breakers. In response to the problems, a multi‐port current‐limiting hybrid DC circuit breaker (MP‐CLHCB) based on thyristors is proposed in this paper. MP‐CLHCB uses low‐cost thyristors instead of IGBTs, and suppresses the rise of fault current through current‐limiting branch. In an attempt to prevent the MP‐CLHCB from reclosing in a permanent fault and causing damage to the DC grid again, an adaptive reclosing scheme is also proposed. In this paper, the topology, operation stages, theoretical derivation, and parameter design of the MP‐CLHCB are provided. Finally, the performance of the MP‐CLHCB is verified and compared through simulations in PSCAD/EMTDC. © 2021 Institute of Electrical Engineers of Japan. Published by Wiley Periodicals LLC. [ABSTRACT FROM AUTHOR]

This article presents a concurrent X‐ and K‐bands low noise amplifier (LNA) for a radar detection system. A dual‐band matching and direct current bias circuitry were configured using surface‐mount device lumped capacitors and distributed transmission lines for the compact size. The designed LNA has dual‐pass band operation and a notch between the X‐ and K‐bands. The proposed LNA was implemented in hybrid integrated circuit technique on the microwave substrate. The measurement has showed the gains of 18.6 and 22.4 dB and noise figures of 3.29 and 1.67 dB at 10.525 and 24.1 GHz, respectively. [ABSTRACT FROM AUTHOR]

Monochiral single‐walled carbon nanotubes (SWCNTs) are promising materials with potential applications in 3D integrated circuits and optoelectronic hybrid circuits. However, the purity and device performance of monochiral SWCNTs are still far lower than expected. Here, the authors demonstrate that specific monochiral SWCNTs can be wrapped by conjugated polymers containing pyridine units, and the supramolecular assemblies show surprising suspension stability even after high‐intensity ultracentrifugation. Additionally, two novel methods are developed, namely, enhanced ultracentrifugation (E‐UCG) and stepwise extraction processing (STEP), which successfully achieve isolation of (10,8) and (12,5) SWCNTs with respective diameters of 1.24 and 1.2 nm at high monochiral purity (92.3% and 95.6%). Their S11 absorption and fluorescence emission peaks are both at ≈1.5 µm (optical telecommunications C‐band). Both micro‐ and nanoscale field‐effect transistor (FET) devices can be fabricated from the as‐isolated (10,8) SWCNTs, and these FETs exhibit excellent electrical performance and a high semiconducting purity of up to 99.94%. [ABSTRACT FROM AUTHOR]

Hybrid integration of n‐type oxide with p‐type polymer transistors is an attractive approach for realizing high performance complementary circuits on flexible substrates. However, the stability of solution‐processed oxide transistors is limiting the lifetime and reliability of such circuits. Oxygen vacancies are the main defect degrading metal oxide transistor performance when ambient oxygen adsorbs onto metal oxide films. Here, an effective surface passivation treatment based on negative oxygen ion exposure combined with UV light is demonstrated, that is able to significantly reduce surface oxygen vacancy concentration and improve the field effect mobility to values up to 41 cm2 V−1 s−1 with high on–off current ratio of 108. The treatment also reduces the threshold voltage shift after 2 days in air from 5 to 0.07 V. The improved stability of the oxide transistors also improves the lifetime of hybrid complementary circuits and stable operation of complementary, analog amplifiers is confirmed for 60 days in air. The suggested approach is facile and can be widely applicable for flexible electronics using low‐temperature solution‐processed metal oxide semiconductors. [ABSTRACT FROM AUTHOR]

The fast raising nature of DC fault currents and sensitivity of high-voltage DC (HVDC) power converters to DC faults is critical protection issues. On the other hand, DC fault current does not meet zero; which causes DC to fault current breaking process become more challenging. Specifically, to protect HVDC grids against DC fault currents, the development of very fast breakers is crucial. This study proposes a DC fault current limiter and breaker, which is able to protect the HVDC system/grid in a very fast and safe manner. The main goal of this study is to enhance the performance of already in the market hybrid DC circuit breakersincluding the magnitude of fault current and breaker operation speed. In the proposed HVDC fault current limiter and breaker, the fault current is limited in two stages by an inductive and resistive current limiter, which drastically decreases the main breaker dissipated energy. The functionality of the proposed HVDC fault current limiter and breaker is mathematically analysed, and then verified by PSCAD and Matlab/Simulink. Finally, simulation results are validated by scaled-down laboratory examinations. [ABSTRACT FROM AUTHOR]

Electronic enclosures often require ventilation and electromagnetic shielding, which have conflicting design requirements. This study proposes a hybrid model, based on circuit model and full‐wave method, for estimating the shielding effectiveness of empty metallic enclosures with ventilation apertures of arbitrary shape or aperture arrays of arbitrary distribution on one side of the enclosures. Such perforated enclosures are split into a perforated plate and semi‐enclosed waveguide that is shorted at the end. The S parameters of the perforated plate are calculated by a full‐wave method and used to estimate the aperture impedance. An equivalent circuit model of a perforated enclosure is established, considering arbitrarily‐positioned apertures, arbitrarily‐chosen observation points, and higher‐order modes. A modified plane wave decomposition technique is adopted to solve the problem of plane waves with arbitrary incident and polarisation directions. In particular, the effects of the electric field components perpendicular to the perforated plate are considered. The efficiency and accuracy of the hybrid model are evaluated by the transmission line matrix method, finite integration technique, experimental observations and existing circuit models. The hybrid model requires much less simulation time than pure full‐wave methods such as the transmission line matrix method. [ABSTRACT FROM AUTHOR]

To achieve current balance between parallel‐connected insulated gate bipolar transistors (IGBTs) of a DC microgrid hybrid circuit breaker (DC MHCB), it is a simple and effective method to add impedance in parallel‐connected IGBTs, but this will also affect the vacuum arc commutation of the DC MHCB. The focus of this paper is the effects of adding impedance on vacuum arc commutation characteristics. By constructing a simplified model of vacuum arc commutation in the case of adding impedance, the effect of adding impedance on vacuum arc commutation is theoretically derived. The test circuit of vacuum arc commutation is established, and the effect of adding impedance on vacuum arc commutation in the presence or absence of the externally applied transverse magnetic field (TMF) is investigated using the electrical measure. The theoretical formula and related formulas of the effect of adding impedance on the duration of vacuum arc commutation are obtained. A method combining adding impedance and an externally applied TMF is proposed. The constraint formula for adding impedance during vacuum arc commutation is obtained. The main factors that limit the value of adding impedance are obtained. Research on the effect of adding impedance on vacuum arc commutation characteristics can provide theoretical guidance for the application of the method of adding impedance in a DC MHCB. © 2020 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. [ABSTRACT FROM AUTHOR]

A hybrid direct current circuit breaker consisting of electrical contacts connected in parallel with a silicon carbide metal oxide semiconductor field‐effect transistor semiconductor device is capable of operating with low energy loss and high short‐circuit tolerance. It features a short‐duration arc discharge during current commutation; however, how the arc affects the dielectric strength between the contacts is not yet clear. This study conducts a quantitative evaluation of the dielectric strength after a short‐duration arc commutation. It is shown that the dielectric strength decreases after the arc commutation, and the breakdown electric field decreases as the arc duration increases. These results suggest that the existence of metal vapor and an increase in contact erosion caused by the commutation arc lower the dielectric strength of the electric contacts, in addition to the known effects of temperature rise of the contact surface and the air between contacts. © 2020 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc. [ABSTRACT FROM AUTHOR]

In this paper, the overvoltage distributions due to the lightning stroke are analyzed for a 500 kV hybrid OHTL-Cable-GIL circuit beside substation, in which the section length is variable. Corona effect is incorporating in order to estimate the attenuation and deformation of overvoltage's travelling waves on transmission lines near substations. The influence of connecting substations surge arrester, direct, and indirect lightning strokes are investigated. ATP/Electro Magnetic Transients Program(EMTP) simulation program is applied to analyze the lightning overvoltage of a 500 kV hybrid OHTL-Cable-GIL system. It was discovered that OHTL-Cable, OHTL-GIL, and hybrid systems produces lightning overvoltages higher than those of a fully cable system and very likely lower than those of a fully OHTL system with the same transmission lengths. This means that the risk of experiencing high lightning overvoltages and stressing system components is higher in a fully-Overhead Line (OHL)circuit than in a partial or full cable or GIL line. Furthermore, using the Cable with MOSA (Metal Oxide Surge Arrester), the results have more regular voltage waveform at substation entrance; also Hybrid line has the same effect of fully GIL. Finally, the corona has a less attenuation effect of overvoltage reached to substation by about 2.7% in case short length OHTL. [ABSTRACT FROM AUTHOR]

In this work, the massive modelling and computation costs required by the calculation of the magnetic leakage coefficient were avoided by using the three-dimensional finite element method (3D-FEM) in the initial design and optimisation of hybrid magnetic couplers (HMCs). The equivalent magnetic circuit network model of HMCs was established, and the equivalent reluctance of the model was calculated to obtain the analytic expression of the magnetic leakage coefficient of HMCs. A set of 1:2 prototypes was designed and manufactured. Simulation analysis and experimental tests were conducted to verify the correctness of the calculation of magnetic leakage. The calculated and experimental values of the magnetic leakage coefficient and the 3D-FEM were in good agreement. The output torque value of the HMC was analysed and calculated by considering that the air-gap leakage was closer to the test value and was more accurate than the value calculated without considering the airgap leakage effect. This study provided a theoretical reference for the design and investigation of HMCs. [ABSTRACT FROM AUTHOR]

Abstract: Hybridization of silicon integrated circuits (ICs) with compound semiconductor device arrays are crucial for making functional hybrid chips, which are found to have enormous applications in many areas. Although widely used in manufacturing hybrid chips, the flip‐chip technology suffers from several limitations that are difficult to overcome, especially when the demand is raised to make functional hybrid chips with higher device array density without sacrificing the chip footprint. To address those issues, Beida Jade Bird Display Limited has developed its unique wafer‐level monolithic hybrid integration technology and demonstrated its advantages in making large‐scale hybrid integration of functional device arrays on Si IC wafers. Active matrix micro‐light‐emitting diode micro‐displays with a resolution of 5000+ pixel per inch were successfully fabricated using Beida Jade Bird Display Limited's monolithic hybrid integration technology. The general fabrication method is described, and the result is presented in this paper. The fabricated monochromatic micro‐light‐emitting diode micro‐displays exhibit improved device performance than do other micro‐display technologies and have great potentials in applications such as portable projectors and near‐to‐eye projection for augmented reality. More importantly, the wafer‐scale monolithic hybrid integration technology offers a clear path for low‐cost mass production of hybrid optoelectronic IC chips. [ABSTRACT FROM AUTHOR]

Integration of oxides with Si opens promising opportunities for novel multifunctional devices and new applications. To optimize the device performances through the hybrid integration, keeping the oxide/Si interface abrupt is critically important and challenging due to the seemingly unavoidable formation of amorphous SiO x or silicide interfacial layers. Here, we report an interface-engineering approach to this issue by molecular beam epitaxy. A BeO thin layer (∼5 nm) was deposited on Si (111) surface using a two-step process of Be deposition and oxidation. The initially formed BeO served as a template for subsequent homo-epitaxial growth of a 10-nm crystalline BeO layer. The well-defined interface between BeO and Si is clearly discerned by high-resolution transmission electron microscopy, implying the role of crystalline BeO as a barrier layer against oxygen atoms' diffusion. High-resolution X-ray photoelectron spectroscopy further confirmed that the combined BeO layers sufficiently protect the Si surface from oxidation. A bottom-gate enhancement-mode thin film transistor was established on a ZnO (130 nm)/BeO (70 nm)/Si architecture, where BeO was functionalized both as a diffusion barrier and as a high- k gate insulator. It indicates that this methodology can be potentially extended to hybrid integration of other technologically important crystalline oxides with Si infrastructures. [ABSTRACT FROM AUTHOR]

ABSTRACT In this article, a novel double balanced image-rejected mixer is proposed. To increase image-rejection, a novel power divider based on quarter-wavelength resonators, a pair of radial-stub-loaded coupled line filters, and a 3 dB RF quadrature microstrip/slot line coupler are employed in our design. The measurement is implemented using the Rohde & Schwarz four-port vector analyzer. The measured results show that, the conversion loss is less than 17 dB with the image rejection over 14 dB within the operating band from 3.1 GHz to 10.6 GHz. Good performances have been achieved. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:578-584, 2017 [ABSTRACT FROM AUTHOR]

ABSTRACT Substrate integrated nonradiative dielectric (SINRD) waveguide fabricated directly on printed circuit board (PCB) or metalized dielectric layer, with its excellent performances of simplifying fabrication process and minimizing mechanical errors, is vitally essential at the microwave and millimeter-wave frequencies. In this article, a transition of coplanar waveguides (CPW) to the SINRD waveguides based is presented, providing effective interconnects for compactly and flexibly integrating the planar-CPW-based devices with the SINRD waveguide circuits. It is found that simulated results are in good agreements with the measured results, which proves the promising future of the SINRD waveguide of PCB version in the area of millimeter-wave hybrid integrated systems. © 2017 Wiley Periodicals, Inc. Microwave Opt Technol Lett 59:898-900, 2017 [ABSTRACT FROM AUTHOR]

A near-threshold low-complexity bandgap reference (BGR) and power-on reset (POR) hybrid circuit is implemented in 65 nm CMOS, with an ultra-low supply voltage of 0.55 V and power consumption of 2.5 μW. The BGR employing amplifier offset voltage and current matching, and the POR based on offset voltage matching and loop settling feature, are proposed. The circuit-level simulation results verify that the presented implementation, not only generates a stable reference voltage with the typical temperature coefficient of 120 ppm/'C and line-regulation feature of 3.3%/V, but provides a robust reset signal with power-on and brown-out detection function. The proposed near-threshold circuit has ultra-low power supply and design complexity, both for BGR and POR modules, when compared to the reported. [ABSTRACT FROM AUTHOR]

One‐dimensional turbulence (ODT) based models are able to generate good results for canonical flow problems compared to Direct Numerical Simulations. ODT has been successfully implemented as a sub‐grid scale model for LES problems (ODTLES) delivering promising results. However, due to the computational cost of the ODT model in this scope, there is a need for an even faster model for real world parameter regimes. The Hierarchical Parcel Swapping (HiPS) algorithm used in combination with the ODT model to simulate a channel flow recently provided results with an acceptable quality in a fraction of the time of an ODT simulation. HiPS uses a binary tree to define the fluid domain, and stochastic eddy events are sampled in this tree. A local instantaneous and complete mixing of the cells is performed when an eddy event happens at the Kolmogorov scale. The biggest limitation of this model is that the viscosity of the solution is implicitly defined by the number of cells in a mesh. Further development of HiPS is planned in order to create a computationally cheaper alternative for the ODT model to be used in ODTLES flow simulations. [ABSTRACT FROM AUTHOR]

Hybrid systems combine continuous‐time and discrete‐time dynamics. They emerge in mechanical systems, inter alia, when collisions are modelled by impulse‐like contact forces. During collisions of two or more bodies, the positions of the latter evolve continuously, but their velocities experience jumps. On the one hand, this non‐smoothness significantly complicates the optimal control problem; on the other, it opens up opportunities for new numerical methods. This contribution uses a nested optimization in order to control the swinging up of a hybrid pendulum‐on‐cart‐system. Both, pendulum and cart, move in finite ranges which are bounded by limiters (elastic collisions). The outer layer optimizes the occurrence and the momenta of the collisions, while the inner layer optimizes the smooth motions from start to collision, from collision to collision, and finally to the terminal state. The discretization and the optimal control of continuous‐time dynamics are based on the Discrete‐Mechanics‐and‐Optimal‐Control (DMOC) approach. [ABSTRACT FROM AUTHOR]

A programmable hybrid circuit is proposed, which is composed of two reconfigurable spoof surface plasmon polariton (SPP) waveguides loaded with varactor diodes and a substrate integrated waveguide (SIW). By manipulating their dispersion behaviors, the band‐pass effect is achieved in the hybrid circuit, in which the upper and lower cutoff frequencies are determined by the SPP waveguide and SIW, respectively. When two SPP waveguides are configured to have the same cutoff frequency that is higher than the SIW's cutoff, the proposed circuit can realize a power division; when one SPP waveguide is reconfigured to reject the waves from SIW, this circuit will be a band‐pass filter. As a typical application, a logic "OR" gate with 2‐bit coding is designed by programming the bias voltages applied to the varactor diodes loaded on the unit structures of the SPP waveguides. All functions are demonstrated by measurement results that agree with numerical simulations very well. The work provides more potential applications in multifunctional integrated circuits and digital communication systems. [ABSTRACT FROM AUTHOR]

In this work, an all‐inorganic memristor based on In ion‐diffused Al2O3 (IAO) is realized by low temperature solution method. Compared to single layer devices, the electrical properties of IAO‐based memristor are highly improved. In this device, both of synaptic and digital switching can be observed by controlling the applied voltage. At a low applied voltage, the memristor exhibits synaptic switching behavior including gradual switching, learning process, forgetting process, and relearning process. If a higher voltage is applied, the switching behavior is changed to digital bipolar switching which could be also archived in bending condition. The switching mechanism is dominated by oxygen vacancies modulation on concentration and formation energy. This novel device can be expected to open a new road for hybrid and printable circuits including synaptic and digital flexible memristors. [ABSTRACT FROM AUTHOR]

On the basis of thin film hybrid integrated circuit technology, a miniaturised X‐band balanced microwave limiter with low insertion loss (IL), low spike and flat leakage power and short recovery time has been presented. The balanced circuit configuration improves the power capacity of the PIN diodes, provides the absorptive load for the reflected power and also effectively tackles the problem of suffering high incident power. The measured results show that the balanced microwave limiter could suffer a pulse with 150 W peak power and 3% duty ratio while the leakage power is <10 mW, and the small signal IL of the circuit is <1.4 dB in the frequency range from 8.8 to 9.8 GHz. [ABSTRACT FROM AUTHOR]