35 results on '"Mir, Salvador"'
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2. Minimizing Test Frequencies for Linear Analog Circuits: New Models and Efficient Solution Methods
3. CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization
4. Adaptive Logical Control of RF LNA Performances for Efficient Energy Consumption
5. On-chip Pseudorandom Testing for Linear and Nonlinear MEMS
6. High Performance SoC Design Using Magnetic Logic and Memory
7. Improvements to Satisfiability-Based Boolean Function Bi-Decomposition
8. On the Functional Test of Branch Prediction Units Based on the Branch History Table Architecture
9. Analysis and Design Strategy of On-Chip Charge Pumps for Micro-power Energy Harvesting Applications
10. A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process
11. Efficient Multi-rate Hybrid Continuous-Time/Discrete-Time Cascade 2-2 Sigma-Delta Modulators for Wideband Telecom
12. Self-dependent Equivalent Circuit Modeling of Electrostatic Comb Transducers for Integrated MEMS
13. Multiplierless Design of Linear DSP Transforms
14. A Low-Power Ultra-Fast Capacitor-Less LDO with Advanced Dynamic Push-Pull Techniques
15. A Low Cost CMOS Polarimetric Ophthalmoscope Scheme for Cerebral Malaria Diagnostics
16. Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design
17. Soft Error Resilient System Design through Error Correction
18. Probabilistic amp; Statistical Design—the Wave of the Future
19. Probabilistic Design: A Survey of Probabilistic CMOS Technology and Future Directions for Terascale IC Design
20. A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs
21. Innovative Optoeletronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices
22. Electronic Detection of DNA Adsorption and Hybridization
23. Designing Routing and Message-Dependent Deadlock Free Networks on Chips
24. Human++: Emerging Technology for Body Area Networks
25. Oversampled Time Estimation Techniques for Precision Photonic Detectors
26. Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model
27. Comparison of an Æthereal Network on Chip and Traditional Interconnects - Two Case Studies
28. Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits
29. Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation
30. A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits
31. Logic Synthesis of EXOR Projected Sum of Products
32. Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation
33. Library Compatible Variational Delay Computation
34. Frequency and Speed Setting for Energy Conservation in Autonomous Mobile Robots
35. A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures
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