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High gain AlGaAs/GaAs heterojunction bipolar transistors (HBTs) grown on silicon substrate have been fabricated. These HBTs-on-Si incorporate depleted AlGaAs passivation ledge to reduce extrinsic base surface recombination current and base quasi-electric field to reduce base bulk recombination current. Measured current gain of 100 is obtained for devices with an emitter area of 4×10 µm2. To our knowledge, this is the highest current gain reported for AlGaAs/GaAs HBTs grown on Si substrates. The dominant base current components is determined. The leakage currents of the base-collector junctions are also examined, and are compared to similar devices grown on GaAs substrate. Implications of these observed junction characteristics of HBTs-on-Si for power applications are discussed.

This letter demonstrates that the emitter crowding effects are much more dramatic for typical Npn HBTs compared to Pnp HBTs. Hence, the design of emitter width in Pnp HBTs is much more flexible and this advantage is shown to favor Pnp HBTs for millimeter-wave power applications.

Devices demonstrating near-ideal I-Vcharacteristics are fabricated to examine the ideality factor for extrinsic base surface recombination in GaInP/GaAs HBTs. These HBTs with various emitter areas have either passivated or exposed extrinsic base surfaces. Comparison of the passivated and unpassivated devices' characteristics indicate that the ideality factor value of the surface recombination is as close to unity as 1.05. The ideality factor value is bias dependent, decreasing to values of 1.6 at lower base-emitter biases.

We present a theoretical analysis for calculating the transient device junction temperature as a function of position and time upon a stepwise increase of power dissipation. The derivation applies in particular to multifinger heterojunction bipolar transistors designed for microwave power application. It is determined that for a typical substrate thickness of 100 µm, the rise time of the junction temperature is roughly 3×10-7s.

The minimum emitter-base contact spacing necessary to prevent current gain degradation is discussed for Npn heterojunction bipolar transistors designed for high-speed applications. Theoretical calculations are performed for various base doping levels, base thicknesses, and emitter widths. These results indicate that the minimum spacing for different design parameters varies between 400 Å and 1300 Å.