Search

This article presents Switched-Capacitor assisted Power Gating (SwCap PG) for reducing the leakage currents of large digital circuits. For the first time, PG switch is biased in the super turn-off and the super turn-on mode during the off-state and the on-state, respectively. A simple switched-capacitor network reconfigures and biases the PG switch in four different possible states with low area and power overhead. During the super turn-off, voltage stress is avoided in the PG switch when the circuit load uses supply voltage equal to the nominal $\text{V}_{\mathbf {DD}}$ in a given technology, and maximum possible leakage current reduction is achieved by the optimal biasing of the gate voltage. The proposed SwCap PG is experimentally validated in the 180nm CMOS technology. Measurement results of CMOS SwCap PG show that leakage current and $\text{R}_{\mathbf {ON}}$ reduce by 186- $226\times $ and 18% respectively, as compared to the conventional PG. An alternate solution for SwCap network using MEMS devices as the switching elements is implemented for additional benefits. Measurement results of MEMS SwCap PG show that leakage current and $\text{R}_{\mathbf {ON}}$ reduce by $172\times $ and 26% respectively, compared to the conventional PG. Finally, the applicability of the SwCap PG in the nano-scale CMOS technologies is addressed. [ABSTRACT FROM AUTHOR]

For ultra-low-power Internet of Things (IoT) devices powered by batteries or energy harvesting, a nonvolatile flip-flop (NV-FF) operating in the near-threshold voltage (NTV) region has been widely studied to save both standby and active power. However, in the NTV region, the NV-FF suffers from restore yield and performance degradation due to the increase in process variation combined with the decrease in supply voltage. This paper presents a comparative analysis of the previous NV-FFs according to supply voltage scaling and suggests the design directions for implementing the NV-FF that can operate with compact area and high performance even in the NTV region. Through the comparative analysis, a novel offset-cancellation sensing-circuit (OCSC)-based NV-FF, which adopts a separate latch and sensing circuit structure and an offset-cancellation technique, is proposed. The Monte Carlo HSPICE simulation results using industry-compatible 65-nm model parameters show that the proposed NV-FF satisfies a target restore yield with 32% area, 88% speed, and 82% energy savings in comparison with a representative NV-FF of the merged latch and sensing circuit structure. [ABSTRACT FROM AUTHOR]