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Carefully tailored periodic nanostructures on the light wavelength scale, such as diffraction gratings, benefit from wave optics for efficiently trapping the weakly absorbing infrared photons in crystalline-silicon (c-Si) absorbers. In contrast with the conventional random pyramid texture, diffraction gratings can be designed to target specific wavelength ranges by the selection of the grating pitch. Absorption enhancement at infrared wavelengths in a silicon solar cell is especially desired when it operates below a perovskite top cell in a tandem device. In this article, inverse nanopyramid gratings of 800 nm pitch are proposed as an alternative front-surface texture to random pyramids in silicon heterojunction devices with interdigitated back contacts that are to be used as bottom cells in four-terminal perovskite/c-Si tandem devices. By doing so, we report a short-circuit current density gain of 0.53 mA/cm2 with respect to the random pyramid texturing for the bottom c-Si cell. The rationale to substitute random pyramids by inverse nanopyramid gratings is, however, not justified in single-junction operation despite achieving the power conversion efficiency of 22.3% since the degraded optical performance at shorter wavelengths offsets the absorption enhancement at longer wavelengths, resulting in similar levels of short-circuit current densities for both texture types.

A fully dry and hydrofluoric-free low-temperature process has been developed to passivate n-type crystalline silicon (c-Si) surfaces. Particularly, the use of a hydrogen (H2) plasma treatment followed by in situ intrinsic hydrogenated amorphous silicon (a-Si:H) deposition has been investigated. The impact of H2 gas flow rate and H2 plasma processing time on the a-Si:H/c-Si interface passivation quality is studied. Optimal H2 plasma processing conditions result in the best effective minority carrier lifetime of up to 2.5 ms at an injection level of 1 × 1015 cm−3, equivalent to the best effective surface recombination velocity of 4 cm/s. The reasons that enable such superior passivation quality are discussed in this paper based on the characterization of the a-Si:H/c-Si interface and c-Si substrate using transmission electron microscopy, high angle annular dark field scanning transmission electron microscopy, and deep-level transient spectroscopy.

A porous silicon-based layer transfer process to produce thin (30-50 μm) kerfless epitaxial foils (epifoils) is a promising approach toward high-efficiency solar cells. For high efficiencies, the epifoil must have high minority carrier lifetimes. The epifoil quality depends on the properties of the porous layer since it is the template for epitaxy. It is shown that by reducing the thickness of this layer and/or its porosity in the near-surface region, the near-surface void size is reduced to <;65 nm and in certain cases achieve a 100 nm-thick void-free zone below the surface. Together with better void alignment, this allows for a smoother growth surface with a roughness of <;35 Å and reduced stress in the porous silicon. These improvements translate into significantly diminished epifoil crystal defect densities as low as ~420 defects/cm 2. Although epifoils on very thin porous silicon were not detachable, a significant improvement in the lifetime (diffusion length) of safely detachable n-type epifoils from ~85 (~300 μm) to ~195 μs (~470 μm) at the injection level of 10 15/cm 3 is achieved by tuning the porous silicon template. Lifetimes exceeding ~350 μs have been achieved in the reference lithography-based epifoils, showing the potential for improvement in porous silicon-based epifoils.

Epitaxial silicon solar cells (“epicells”) are based on an epitaxial active layer (“epilayer”) grown on top of a low‐cost, inactive p+silicon substrate. A key challenge is to mitigate transition metal out‐diffusion from the low‐purity substrate into the active layer. An embedded porous silicon (PSi) layer can be used to getter metals within the substrate. This was studied theoretically using density functional theory where large binding energies (∼1.9–2.2 eV) for metal segregation to PSi void surface were calculated for Fe and Cu. Incorporating this in a diffusion model yielded large gettering coefficients of ∼104even at 1000 °C. To verify this experimentally, a test structure consisting of a 2‐µm thick epilayer grown on top of an 8.5 × 8.5 cm2area of re‐organized PSi etched into the middle of an 8″ Cz, p+wafer was used. These wafers were surface‐contaminated with metals (Fe, Ni, Cu) to ∼1014–1015cm−2and annealed at high temperatures (950–1000 °C) for up to 15 min. This allowed the metals to distribute throughout the wafer and getter to preferential sites. Direct total reflection X‐ray fluorescence mapping of Cu on the front side showed that the embedded PSi reduced the amount of Cu reaching the top surface by ∼103times, compared to the areas without PSi. Moreover, SIMS depth profiling revealed large metal concentrations (1018–1019cm−3) in the depth associated with PSi, while the metal concentrations were below detection limits in the surrounding area, suggesting a gettering coefficient of ∼103–104. A slow cooling rate and smaller pore radii were also found to be beneficial for gettering.