1. Lateral GaN JFET Devices on Large Area Engineered Substrates
- Author
-
Anderson, Travis J., Luna, Lunet E., Aktas, Ozgur, Foster, Geoffrey M., Koehler, Andrew D., Tadjer, Marko J., Mastro, Michael A., Hobart, Karl D., Odnoblyudov, Vladimir, Basceri, Cem, and Kub, Francis J.
- Abstract
Lateral GaN-based p-n junction gated field effect transistor (LJFET) power transistors on large area substrates were fabricated as a proof-of-concept to evaluate candidate power switching devices that could be designed with avalanche breakdown capability. The devices performed to design specifications aimed at demonstrating a device suitable for operation in cascode with a normally-off low-voltage Si based transistor companion. The maximum current density was 200 mA/mm and threshold voltage was [?]30V. Large gate width devices (40mm) exhibited >1A current. The devices have blocking capability to 800V. Initial testing of the switching dynamics indicates low dynamic RON even with an un-optimized buffer.
- Published
- 2019