Thees, H.-J, Wittmaack, M, Stegemann, K.-H, Borany, J.v, Heinig, K.-H, and Gebel, T
MOSFETs with gateoxides containing nanoclusters (Si, Ge, Sn, Sb) fabricated with different techniques (implantation, LPCVD, sputtering) are very promising for future memories. This contribution reports on results obtained on Ge-implanted MOS capacitors. By varying the implantation and annealing parameters, the Ge depth profile and the cluster size and distribution can be controlled. The experimental results are explained by a theoretical model, which is based on TRIM calculations, rate-equation studies and 3D kinetic Monte Carlo simulations. The electrical properties of gate SiO2containing Ge nanoclusters are investigated in detail with emphasis on its feasibility for memory applications.