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A patent has been issued for an image forming apparatus by Canon Kabushiki Kaisha. The patent describes a configuration that notifies the user of the position of a recording medium remaining in the apparatus. The invention includes a conveyance unit with sensors and light sources that determine the position of a paper jam and control the corresponding light source to turn on. The apparatus also includes a capacitor to reduce voltage fluctuation and a shut-off mechanism when the conveyance unit is pulled out. The invention aims to provide a less expensive configuration for notifying paper jams in an image forming apparatus. [Extracted from the article]

A new report from the University of Florence in Italy provides an extensive review of monitoring methods for electrical power lines, with a focus on high-voltage and medium-voltage systems. The objective of these techniques is to prevent catastrophic failures by detecting partial damage or deterioration of components and allowing for organized maintenance operations. The paper discusses the coordination of protection devices and the implementation of artificial intelligence algorithms to improve the reliability of the network. It also highlights diagnostic techniques, protection devices, and prognostic methods, emphasizing the role of artificial intelligence and offering guidelines for choosing between different approaches. [Extracted from the article]

Nippon Paper Industries Co. completed a 5-megawatt biomass power station in the southwestern prefecture of Kumamoto, the company said in a statement Wednesday. The plant will use timber from forest thinning as fuel and the electricity produced at the station will be sold to Kyushu Electric Power Co. under the country's incentive program for clean energy, according to the statement. [Extracted from the article]

Purpose: Currently, more renewable energy resources with advanced technology levels are incorporated in the electric power networks. Under this circumstance, the attainment of optimal economic dispatch is very much essential by the power system as the system requires more power generation cost and also has a great demand for electrical energy. Therefore, one of the primary difficulties in the power system is lowering the cost of power generation, which includes both economic and environmental costs. This study/paper aims to introduce a meta-heuristic algorithm, which offers an solution to the combined economic and emission dispatch (CEED). Design/methodology/approach: A novel algorithm termed Levy-based glowworm swarm optimization (LGSO) is proposed in this work, and it provides an excellent solution to the combined economic and emission dispatch (CEED) difficulties by specifying the generation of the optimal renewable energy systems (RES). Moreover, in hybrid renewable energy systems, the proposed scheme is extended by connecting the wind turbine because the thermal power plant could not control the aforementioned costs. In terms of economic cost, emission cost and transmission loss, the suggested CEED model outperforms other conventional schemes genetic algorithm, Grey wolf optimization, whale optimization algorithm (WOA), dragonfly algorithm (DA) and glowworm swarm optimization (GSO) and demonstrates its efficiency. Findings: According to the results, the suggested model for Iteration 20 was outperformed GSO, DA and WOA by 23.46%, 97.33% and 93.33%, respectively. For Iteration 40, the proposed LGSO was 60%, 99.73% and 97.06% better than GSO, DA and WOA methods, respectively. The proposed model for Iteration 60 was 71.50% better than GSO, 96.56% better than DA and 95.25% better than WOA. As a result, the proposed LGSO was shown to be superior to other existing techniques with respect to the least cost and loss. Originality/value: This research introduces the latest optimization algorithm known as LGSO to provide an excellent solution to the CEED difficulties by specifying the generation of the optimal RES. To the best of the authors' knowledge, this is the first work that utilizes LGSO-based optimization for providing an excellent solution to the CEED difficulties by specifying the generation of the optimal RES. [ABSTRACT FROM AUTHOR]

This paper introduces an on-chip distributed power delivery grid (DPDG) with cooperative regulation and IR-drop reduction based on analog-assisted digital LDOs (AADLDOs), which inherit the merits of low output ripple and sub-LSB current supply ability from the analog control, and the advantage of low supply voltage operation and adaptive fast response from the digital control. With the distributed power delivery topology, the IR-drop across the power supply rail can be reduced, especially in large area power-supply applications. The AADLDOs in the power delivery grid work cooperatively to obtain a balance between improved response speed and power consumption. A prototype of a 3 × 3 power grid with 9 AADLDOs, providing a total of 500-mA maximum load current with an on-chip 0.9-nF output capacitor, is fabricated in a 65-nm CMOS process to demonstrate the proposed DPDG concept and the effectiveness of this scheme. A maximum voltage undershoot of 125mV is measured with a 450mA/20ns load step, resulting a figure-of-merit as low as 0.249ps. [ABSTRACT FROM AUTHOR]

Purpose: This paper aims to study the possibility of controlling the electromagnetic stirrer (EMS) is fundamental in a continuous casting line to achieve the desired properties of homogeneity and mechanical strength in the solidified cast. Design/methodology/approach: Coupled electromagnetic (EM) and fluid dynamic (FD) simulations allow to predict the mixing effect on molten metal, in terms of velocity amplitude and shape of the flow. This paper describes the numerical results of EMS effect within a cylindrical crucible, surrounded by a solenoidal inductor, filled with a low melting temperature alloy, i.e. GalInStan. Findings: Induced forces and resulting velocity distribution of the flow of the liquid metal have been calculated depending on varying amplitude and frequency of the supplied current. As expected, at a given amplitude of the current supply, the velocity distribution shows a maximum at a certain frequency while the intensity of electrodynamic forces monotonically increase as the frequency increases Originality/value: The paper deals with simply models and experiments applied to coupled EM and FD problem, to assess the applied methodology. [ABSTRACT FROM AUTHOR]

Purposes: The purpose of this paper is to identify on the instantaneous electrical power basis of a nonsinusoidal periodic current three-phase asymmetric system, active and reactive positive, negative and zero sequence powers, taking into account higher harmonics. The main power theories, including those embodied in the IEEE 1459 standard, do not allow to evaluate some of power components. Design/methodology/approach: A well-known fact is that the three-phase AC system total power with the symmetry of currents and voltages is constant. It corresponds to the electrical energy transfer process in a DC system. In this case, the electrical energy transmission can be taken as high quality. It has been established that the components of active and reactive powers are because of the product of current and voltage of unidirectional sequences. The orthogonal components of the oscillating power are because of the product of the voltage and current components of different sequences, with the exception of the zero sequence. Findings: For an unbalanced nonsinusoidal mode of a three-phase system, the components of instantaneous power were defined, corresponding to the active and reactive positive and negative and zero sequences powers with the selection of the fundamental and higher harmonics. The active and reactive powers of sequences were divided into two categories – consumed and generated. Originality/value: It is proposed to use the ratio of "interfere" power RMS value to the total power RMS value to assess the instantaneous power distortion. [ABSTRACT FROM AUTHOR]

In this paper, two output matching networks (OMNs) are proposed for integrated class-J and class-J−1 mode power amplifiers (PAs). The first MN provides the required load impedances of the class-J mode (i.e., $Z(f_{0})=R_{\mathrm{ opt}}+jR_{\mathrm{ opt}}$ and $Z({2}f_{0})=-j({3}\pi /{8})R_{\mathrm{ opt}}$), whereas the second MN realizes the optimal impedances of class-J−1 PAs (i.e., $Z(f_{0})=R_{\mathrm{ opt}}-jR_{\mathrm{ opt}}$ and $Z({2}f_{0})=j({3}\pi /{8})R_{\mathrm{ opt}}$). Detailed theoretical analyses are presented for each MN, and the values of matching components (i.e., inductors and capacitors) are obtained in terms of $R_{\mathrm{ opt}}$. Analytical derivations are verified by simulation results, while bandwidth and loss performances of each MN are also characterized. Two proof-of-concept class-J and class-J−1 PAs are designed and implemented in a 0.25- $\mu \text{m}$ GaAs process, where the proposed OMNs are employed in the designed circuits. The manufactured PAs show ≥28 dBm output power, ≥65% drain efficiency, and ≥61% power-added efficiency at 2 GHz. [ABSTRACT FROM AUTHOR]

This paper presents an efficiency-enhanced low-profile zero-voltage-transition (ZVT) synchronous non-inverting buck-boost converter for 48-V tens-of-Watt output applications. By only using three auxiliary components shared between two switching nodes, zero-voltage switching (ZVS) of all four power switches and zero-current switching of the auxiliary switch are achieved in the proposed converter to minimize the switching power loss. Compared with the existing ZVT topologies, the proposed converter reduces the required number of auxiliary components, thereby decreasing the converter volume and power loss. In addition, the proposed converter can be configured into the buck mode with full ZVS capability to support a wide input range from 36 V to 90 V. Experimental results show that the proposed converter can operate at 1 MHz and deliver a maximum output power of 75 W. The measured peak power efficiencies achieve 92.5% and 96.3% in the buck-boost mode and buck mode, respectively. Compared with the state-of-the-art ZVS-based buck-boost counterpart, the proposed converter reduces the volume of the auxiliary circuit by ~2 times even with 28% increase in the maximum load current and two times reduction in the switching frequency, and provides higher peak power efficiencies in both buck-boost and buck modes. [ABSTRACT FROM AUTHOR]

Purpose Efficient calculations of the transient behaviour after disturbances of large-scale power systems are complex because of, among other things, the non-linearity and the stiffness of the overall state equation system (SES). Because of the rising amount of flexible transmission system elements, there is an increasing need for reduced order models with a negligible loss of accuracy. With the Extended Nodal Approach and the application of the singular perturbation method, it is possible to reduce the order of the SES adapted to the respective setting of the desired tasks and accuracy requirements.Design/methodology/approach Based on a differential-algebraic equation for the electric power system which is formulated with the Extended Nodal Approach, the automatic decomposition into reduced order models is shown in this paper. The paper investigates the effects of different coordinate systems for an automatic order reduction with the singular perturbation method, as well as a comparison of results calculated with the full and reduced order models.Findings The eigenvalues of the full system are approximated sufficiently by the three subsystems. A simulation example demonstrates the good agreement between the reduced order models and the full model independent of the choice of the coordinate system. The decomposed subsystems in rotating coordinates have benefits as compared to those in static coordinates.Originality/value The paper presents a systematic decomposition based only on a differential-algebraic equation system of the electric power system into three subsystems. [ABSTRACT FROM AUTHOR]

When the drawer unit is pulled out from the image forming apparatus, the LED glows on the electric power accumulated in the capacitor. The image forming apparatus according to claim 1, wherein the conveyance unit further includes the motor." "Description of the Related Art "There has been conventionally known a configuration in which a drawer unit including a conveyance path is pulled out from an image forming apparatus so that a recording medium remaining in the image forming apparatus can be removed. [Extracted from the article]

This paper presents a self-biased subthreshold CMOS voltage reference for low-power and low-voltage applications. To achieve near-zero line sensitivity and high PSRR, a compensation structure utilizing the drain-induced-barrier-lowering (DIBL) effect is proposed to sink a supply dependent current from the output branch of a self-biased CMOS reference, which cancels the bias current’s dependence on the supply voltage due to the DIBL effect. Fabricated in a 0.18- $\mu \text{m}$ CMOS technology, the measurement results demonstrate that the proposed circuit could operate under a minimum supply voltage of 0.34 V and generate a reference voltage of 147 mV, while consuming only 48 pW power. The PSRRs measured at 1 Hz and 10 kHz are −70.6 dB and −50.2 dB, respectively. For 39 measured samples, the mean line sensitivity is 0.019%/V in a supply voltage range from 0.34 to 1.8 V, and the average temperature coefficients before and after trimming are 64.81 and 10.06 ppm/°C in 0 ~ 100 °C temperature range, respectively. The total area of the voltage reference circuit is 0.0332mm2. [ABSTRACT FROM AUTHOR]

Provides a listing of current staff, committee members and society officers. [ABSTRACT FROM AUTHOR]

This paper presents a 60-dB gain bulk-driven Miller OTA operating at 0.25-V power supply in the 130-nm digital CMOS process. The amplifier operates in the weak-inversion region with input bulk-driven differential pair sporting positive feedback source degeneration for transconductance enhancement. In addition, the distributed layout configuration is used for all the transistors to mitigate the effect of halo implants for higher output impedance. Combining these two approaches, we experimentally demonstrate a high gain of over 60-dB with just 18-nW power consumption from 0.25-V power supply. The use of enhanced bulk-driven differential pair and distributed layout can help overcome some of the constraints imposed by nanometer CMOS process for high performance analog circuits in weak inversion region. [ABSTRACT FROM AUTHOR]

Purpose Wide-bandgap (WBG) semiconductors have emerged as a disruptive technology in the power electronics sphere. This paper aims to analyse and discuss the importance for induction heating systems and gives some examples and highlights some future design trends and perspectives.Design/methodology/approach The benefits of WBG semiconductors are reviewed with a special emphasis on induction heating applications.Findings WBG devices enable the design of higher-performance induction heating power supplies. A significant selection of the reported converters is discussed, highlighting the benefits of this technology.Originality/value This paper highlights the benefits of WBG semiconductors and their potential to change and improve induction heating technology in the next years. [ABSTRACT FROM AUTHOR]

Purpose Litz wire manufacturing using mechanical procedures presents several limitations regarding reliability and repeatability, especially when a small strand diameter is used. This paper aims to propose a power supply design for Litz wire manufacturing using a high-frequency high-performance resonant converter.Design/methodology/approach This paper proposes the design of a resonant power supply for induction heating specially designed to tackle with the challenge of heating Litz wires quickly.Findings The proposed converter enables the removal of the isolating coating from the Litz wire through induction heating, improving significantly the manufacturing process.Originality/value The proposed converter improves significantly the manufacturing process of Litz wire through induction heating, with economic and reliability benefits. [ABSTRACT FROM AUTHOR]

Dynamic flip-flop conversion (DFFC) is a time borrowing method for improving the performance of digital circuits. Existing types of DFFC [11], [12] suffer from successive critical and critical feedback paths that are frequently seen in digital circuits. Moreover, they are unable to increase the performance of the designs with short sequential depth. In this paper, we introduce a hybrid technique which utilizes DFFC together with a dynamic clock stretching mechanism. Our technique is able to mitigate the problems of successive critical and critical feedback path structures even in the presence of process variations. The results show that our hybrid technique is able to increase the performance of some ITC'99 and ISCAS'89 benchmarks by 24.4% on average while DFFC Type C increases the performance only by 8.4% on average. Furthermore, we have shown that our hybrid technique is able to tolerate process variations, 18% power supply variation, and 100 °C temperature variations, 27.3%, 16.4%, and 13.3% better than the state-of-the-art methods on average, respectively. [ABSTRACT FROM PUBLISHER]

Purpose The purpose of this paper is to introduce a reverted way to design electrical machines. The authors present a work flow that systematically yields electrical machine geometries from given air gap fields.Design/methodology/approach The solution process exploits the inverse Cauchy problem. The desired air gap field is inserted to this as the Cauchy data, and the solution process is stabilized with the aid of linear algebra.Findings The results are verified by solving backwards the air gap fields in the standard way. They match well with the air gap fields inserted as an input to the system.Originality/value The paper reverts the standard design work flow of electrical motor by solving directly for a geometry that yields the desired air gap field. In addition, a stabilization strategy for the underlying Cauchy problem is introduced. [ABSTRACT FROM AUTHOR]

This paper explores the subharmonic oscillation mechanism for constant on-time control, which has been widely used for power supply controllers in industry. As well as analyzing the stability criterion, this research reveals that the circuit propagation delay (\Delta t) can significantly increase the demand of ESR\cdot Co value for stable operation in practical applications. A thorough study is provided based on the inductor current information and the charge variations of the output capacitor. Thus, critical condition for subharmonic oscillation is derived, and the effect of circuit propagation delay is also quantified. Based on detailed analysis, a prototype with constant on-time control and added inductor current ramp is built. Experimental results verify the theoretical analysis. [ABSTRACT FROM AUTHOR]

Purpose |!|#8211; The purpose of this paper is to develop a new method for classification of power quality (PQ) disturbances such as the sag, interruption, swell, harmonic, notch, oscillatory transient and impulsive transient. Design/methodology/approach |!|#8211; A PQ disturbances classification system based on wavelet packet energy and multiclass support vector machines (MSVM) is proposed to discriminate seven types of PQ disturbances. The PQ disturbance signals are first decomposed into components in different subbands using discrete wavelet packet transform (DWPT). Statistical features of the decomposed signals are required to characterize the PQ disturbances. A MSVM classifier follows to classify the PQ disturbances. Findings |!|#8211; The proposed method could effectively detect information from disturbance waveforms using DWPT and MSVM techniques, which is verified on over 700 samples. Research limitations/implications |!|#8211; The classification stage of the proposed method does not differentiate the disturbances occurred simultaneously. Practical implications |!|#8211; The proposed method possesses high recognition rate, so it is suitable for the PQ monitoring system for detection and classification of disturbances. Originality/value |!|#8211; The paper describes a new and efficient way of classification of PQ disturbances. In this paper, an attempt has been made to extract efficient features of the PQ disturbances using DWPT. It is observed that these features can help correctly classify the PQ disturbances, even under noisy conditions. The MSVM is compared with artificial neural network (ANN) and it is found that the MSVM classifier gives the better result. [ABSTRACT FROM AUTHOR]

In this paper, a transformer (TF)-based two-stage dual-radial power splitting/combining architecture with advantages of in-phase RF power splitting/combining scheme, compact splitting/combining network, uniform dc distribution, and symmetric dc current supply/return path is developed. To verify the feasibility of the architecture, a 5.2-GHz high-gain fully integrated PA is designed and fabricated on standard 0.18- $\mu \text{m}$ CMOS technology. The CMOS PA transmits 30.1-dBm saturation power (${P}_{{sat}}$) with 22.2% power added efficiency (PAE) at 5.2 GHz. The measured power gain is 30.8 dB and the output 1-dB compression point (${{OP}}_{{1dB}}$) is 24.1 dBm. The EVM has been measured with IEEE 802.11ac WLAN modulated signals. Using the 20-MHz bandwidth OFDM 64-QAM modulated signal, the PA meets the WLAN EVM specification of 5.6% up to 19.8-dBm linear output power. For a high data rate of 80-MHz bandwidth OFDM 256-QAM signal, the PA transmits linear output power of 17 dBm with 2.5% EVM. To the best of our knowledge, the CMOS PA achieves the highest output power, the highest power gain, and the highest OP1dB with decent PAE among other reported fully integrated CMOS PAs around 5 GHz to date. [ABSTRACT FROM AUTHOR]

Approximate circuits have been considered for applications that can tolerate some loss of accuracy with improved performance and/or energy efficiency. Multipliers are key arithmetic circuits in many of these applications including digital signal processing (DSP). In this paper, a novel approximate multiplier with a low power consumption and a short critical path is proposed for high-performance DSP applications. This multiplier leverages a newly designed approximate adder that limits its carry propagation to the nearest neighbors for fast partial product accumulation. Different levels of accuracy can be achieved by using either OR gates or the proposed approximate adder in a configurable error recovery circuit. The approximate multipliers using these two error reduction strategies are referred to as AM1 and AM2, respectively. Both AM1 and AM2 have a low mean error distance, i.e., most of the errors are not significant in magnitude. Compared with a Wallace multiplier optimized for speed, an $8\times 8$ AM1 using four most significant bits for error reduction shows a 60% reduction in delay (when optimized for delay) and a 42% reduction in power dissipation (when optimized for area). In a $16\times 16$ design, half of the least significant partial products are truncated for AM1 and AM2, which are thus denoted as TAM1 and TAM2, respectively. Compared with the Wallace multiplier, TAM1 and TAM2 save from 50% to 66% in power, when optimized for area. Compared with existing approximate multipliers, AM1, AM2, TAM1, and TAM2 show significant advantages in accuracy with a low power-delay product. AM2 has a better accuracy compared with AM1 but with a longer delay and higher power consumption. Image processing applications, including image sharpening and smoothing, are considered to show the quality of the approximate multipliers in error-tolerant applications. By utilizing an appropriate error recovery scheme, the proposed approximate multipliers achieve similar processing accuracy as exact multipliers, but with significant improvements in power. [ABSTRACT FROM AUTHOR]

Purpose The purpose of this paper is to identify faults in distribution systems which are unavoidable because of adverse weather conditions and unexpected accidents. Hence, quick fault location is vital for continuous power supply. However, most fault location methods depend on the stored database for locating fault. The database is created by simulation, which is time consuming. Therefore, in this work, a comprehensive fault location method to detect faulty section and fault distance from one-ended bus using limited simulated data is proposed.Design/methodology/approach The work uses voltage sag data measured at a primary substation. Support vector machine estimates the data which are not simulated. The possible faulty section is determined using matching approach and fault distance using mathematical analysis.Findings This work proposed a ranking analysis for multiple possible faulty sections, and the fault distance is calculated using Euclidean distance approach.Practical implications The research work uses Malaysian distribution system as it represents a practical distribution system with multiple branches and limited measurement at primary substation. The work requires only metering devices to identify fault which is cost effective. In addition, the distribution system is simulated using real-time PSCAD by which the capability of proposed method can be fully tested.Originality/value The paper presents a new method for fault analysis. It reduces simulation time and storage space of database. The work identifies faulty section and ranks the prior faulty section. It also identifies fault distance using a mathematical approach. [ABSTRACT FROM AUTHOR]

This paper deals with the system oriented analysis, design, modeling, and implementation of active clamp HF link three phase converter. The main advantage of the topology is reduced size, weight, and cost of the isolation transformer. However, violation of basic power conversion rules due to presence of the leakage inductance in the HF transformer causes over voltage stresses across the cycloconverter devices. It makes use of the snubber circuit necessary in such topologies. The conventional RCD snubbers are dissipative in nature and hence inefficient. The efficiency of the system is greatly improved by using regenerative snubber or active clamp circuit. It consists of an active switching device with an anti-parallel diode and one capacitor to absorb the energy stored in the leakage inductance of the isolation transformer and to regenerate the same without affecting circuit performance. The turn on instant and duration of the active device are selected such that it requires simple commutation requirements. The time domain expressions for circuit dynamics, design criteria of the snubber capacitor with two conflicting constrains (over voltage stress across the devices and the resonating current duration), the simulation results based on generalized circuit model and the experimental results based on laboratory prototype are presented. [ABSTRACT FROM PUBLISHER]

Purpose – The purpose of this paper is to present a practical method for computing contingency-based reliability and quality indices in power systems and to answer questions related to how much the system is reliable, how robust it is in surviving random contingencies, how much it is costing to maintain appropriate system security and reliability levels and, finally, to what extent the desired balance is maintained between generation facilities, transmission capabilities and consumer demand levels in various zones of the electric power system. Design/methodology/approach – The methodology adopted in this paper is based on a combined contingency analysis/reliability evaluation scheme. A three-component system model is utilized, which can be used effectively for evaluation and sensitivity analysis of reliability and quality in power systems. The model is a reduced (equivalent) system representation that comprises generation, transmission and load components with multi-state values. The computational scheme presented in the paper integrates both the contingency effect and its probability of occurrence into one routine of analysis while reducing the power system around the region of interest. Findings – The computational scheme presented in the paper can effectively assess both service reliability and system quality. The practical applications presented demonstrated that lower service reliability levels would jeopardize energy supply continuity and increase the likelihood of additional maintenance and restoration costs due to the resulting higher rate of system outages. Poor system quality levels, on the other hand, imply either deficiency or excess in the overall system capabilities as designed by its planners. Originality/value – The work of this paper contributes to the solution of the reliability and quality assessment problem in practical power systems. As part of the present work, an advanced computerized scheme for fast composite system reliability and quality assessment was developed and then applied to an equivalent system model of the Saudi electricity system. The results obtained are claimed to have far-reaching implications on various planning and operation aspects of the power system. [ABSTRACT FROM AUTHOR]

The article talks about the functions of a computer power supply and the difference between the new retail power supplies from the usual gray boxes sold in bulk. The author explains that the Power Supply Unit (PSU) switches AC electricity into regulated DC voltages that was delivered to the inside parts of the computer. Several different DC voltages were needed and each voltage rail has a specific set of functions. It was also mentioned that maintaining a consistent voltage within a specific range is necessary for a PSU because providing excessive voltage can lead to a shortened lifespan for the unit.

The efforts to find Lyapunov functions for power Systems with losses have been until now in vain. Despite that, engineers have been using approximated energy-like functions to obtain good estimates of the critical clearing lime (CCT) in transient stability analysis of power systems. These approximated energy-like functions are not Lyapunov functions, and are usually obtained by an integration process followed by an approximation of the integration path. Therefore, the good CCT estimates obtained with these functions are not supported by a sound theory. Nevertheless, it is shown in this paper, for a particular approximated energy-like function, a theoretical approach to support these good estimates. The approximated energy-like function studied in this paper is well known in the literature, and was proposed by Athay et al in the COA formulation. It is shown that this approximated energy-like function is neither a Lyapunov function in the usual sense, nor an extended Lyapunov function, when the transfer conductances are taken into account. In spite of that, a function attending the requirements of the extension of the Invariance Principle, that is, an extended Lyapunov function, can be obtained by smooth pertur- bations on that energy-like function. This perturbed function can be used to estimate the attraction area without approximations or conjectures. Indeed, the difference between the proposed extended Lyapunov function and the approximated energy-like function has the order of a smooth perturbation. This fact supports the good CCT estimates that have been obtained using these approximated energy-like functions, and encourages engineers to keep using them for CCT estimates. [ABSTRACT FROM AUTHOR]

Variable-Structure piecewise-linear nonlinear dynamic feedback systems emerge frequently in power electronics. This paper is concerned with the stability analysis of these systems. Although it applies the usual well-known and widely used approach, namely, the eigenvalues of the Jacobian matrix of the Poincaré map function belonging to a fixed point of the system to ascertain the stability, this paper offers two contributions for simplification as well that utilize the periodicity of the structure or configuration sequence and apply an alternative simpler and faster method for the determination of the Jacobian matrix. The new method works with differences of state variables rather than derivatives of the Poincaré map function (PMF) and offers geometric interpretations for each step. The determination of the derivates of PMF is not needed. A key element is the introduction of the so-called auxiliary state vector for preserving the switching instant belonging to the periodic steady-state unchanged even after the small deviations of the system orbit around the fixed point. In addition, the application of the method is illustrated on a resonant dc-dc buck converter. [ABSTRACT FROM AUTHOR]

This paper treats the modeling of integrated electromagnetic power passives for integrated power electronics modules by using a distributed conductive structure approach. The distributed L-C cell is chosen as the basis for modeling. This paper presents the modeling of an L-C cell through the proposed generalized transmission structure theory that can be applied to both balanced and unbalanced current distributions. The load characteristics of a generalized transmission structure are investigated. The proposed theory has been extended to cascaded structures as well. The calculation results correlate well with the impedance measurement results. Some practical design issues are also discussed. [ABSTRACT FROM AUTHOR]

This paper describes a method for analyzing the bifurcation phenomena in switched dynamical systems whose switching borders are varying periodically with time. The type of systems under study coven most of power electronics circuits where two or more dynamical systems are cyclically switched according to the interaction of the state variables and some periodically moving borders. In particular, the complex bifurcation behavior of a voltage feedback buck converter is studied in detail. The analytical method developed in this paper allows bifurcation scenarios to be clearly revealed in any chosen parameter space. [ABSTRACT FROM AUTHOR]

Purpose In high voltage direct current (HVDC), power cables heat is generated inside the conductor and the insulation during operation. A higher amount of the generated heat in comparison to the dissipated one, results in a possible thermal breakdown. The accumulation of space charges inside the insulation results in an electric field that contributes to the geometric electric field, which comes from the applied voltage. The total electric field decreases in the vicinity of the conductor, while it increases near the sheath, causing a possible change of the breakdown voltage.Design/methodology/approach Here, the thermal breakdown is studied, also incorporating the presence of space charges. For a developed electro-thermal HVDC cable model, at different temperatures, the breakdown voltage is computed through numerical simulations.Findings The simulation results show a dependence of the breakdown voltage on the temperature at the location of the sheath. The results also show only limited influence of the space charges on the breakdown voltage.Research limitations/implications The study is restricted to one-dimensional problems, using radial symmetry of the cable, and does not include any aging or long-term effect of space charges. Such aging effect can locally increase the electric field, resulting in a reduced breakdown voltage.Originality/value A comparison of the breakdown voltage with and without space charges is novel. The chosen approach allows for the first time to assess the influence of space charges and field inversion on the thermal breakdown. [ABSTRACT FROM AUTHOR]

Considering the coupling relationships between transfer power and efficiency in continuous-mode inductive power transfer (IPT) systems, this paper presents a pulse energy injection inverter for IPT systems. With a new topology and parameters tuning, the pulse energy injection IPT system with the proposed inverter can work in switch-mode to decouple transfer power with efficiency. Moreover, the transfer power is only decided by the duty ratio of the semiconductor switch, rather than affected by the transmitting resonator, receiving (Rx) resonator, and load. In this way, the pulse energy injection IPT system holds an operating frequency much lower than the resonant frequency to reduce switch loss and improve transfer efficiency. Experiments verify that the IPT system with proposed inverter maintains a high level efficiency within the middle range and realizes nearly 80% supply to load transfer efficiency even in a weak coupling coefficient ( $k=0.044$ ). Finally, experimental analysis implies that the pulse energy injection inverter is suitable for full-range transmission, and high-Q IPT systems with uncertainty in Rx circuits or load. [ABSTRACT FROM AUTHOR]

Finance Division has reportedly shown willingness to allocate Rs 450 billion for power sector subsidy in FY 2023-24 as compared to Rs 350 billion for the outgoing fiscal year (2022-23), well informed sources told Business Recorder. Answering to an inquiry, the sources said, Power Division has previously made a move concerning program/credit conditions by Global Financial Asset (IMF) and World Bank. [Extracted from the article]

The article focuses on the electric power industry in the United States. Scott Paper Co. is better known for making paper than for generating electricity. But now, Scott Paper Co. and a number of industrial manufacturers are making profits by wholesaling excess self-generated electricity to Central Maine Power Co. (CMP) at roughly 30% more than customers are paying for electricity supplied by CMP itself. The Public Utility Regulatory Policies Act obliges utilities to buy power from small producers that can generate the energy as a by-product of other industrial operations.

A single-cycle tree-based 64-bit binary comparator with constant-delay (CD) logic realized in a 65-nm, 1-V CMOS process is presented in this paper. Unlike dynamic logic yet domino-compatible, CD logic predischarges the output to logic “0” and conditionally makes a transition to logic “1” through the critical-path CLK PMOS transistors for an NMOS transistor network. The constant delay (regardless of the fan-in) feature makes it up to 2\times faster than a dynamic logic gate during the D-Q mode for a complex logic such as a two-bit binary comparator. The proposed comparator's architecture is divided into two stages, where the first stage adapts a novel tree comparator structure specifically designed for static logic to achieve low-power consumption and the second stage utilizes CD logic to realize high performance without sacrificing the overall energy efficiency. At 1-V supply, the proposed comparator's measured delay is 167 ps, and has an average power and a leakage power of 2.34 mW and 0.06 mW, respectively. At 0.3-pJ iso-energy or 250-ps iso-delay budget, the proposed comparator with CD logic is 20% faster or 17% more energy-efficient compared to a comparator implemented with just the static logic. [ABSTRACT FROM AUTHOR]

Purpose: For a given rotor, the study of the impact of stator MMF from different winding distributions is usually carried out using analytical model under some simplifying hypotheses to limit time computation. To get more accurate results, finite element model is thus more suitable. However, testing different combinations of stator windings with the same rotor can be tedious when considering the stator slots. Indeed, this introduces mesh constraint, reluctance variation of the air gap and possibly taking into account of the connection between stator coils. To avoid this, a current sheet supplied such to represent the stator MMF and spread all around the inner slotless stator surface can be used. In addition, such an approach can be very useful to didactically assess the effect of each winding space harmonic on machine performance separately. The purpose of this paper is to use a current sheet coupled to an external analytical tool in order to easily test different windings or to quantify the effect of a given spatial harmonic of the winding. Design/methodology/approach: In the proposed approach, the current sheet supply is obtained from an analytical tool that allows determining the spatiotemporal stator MMF of any winding considered. Moreover, stator teeth height is not modelled, and only the thickness of the stator yoke is considered along with the same air gap thickness. Results with the proposed approach are compared to the real stator modelling for two different winding configurations. Last, linear and non-linear magnetic material behaviours are investigated to validate the proposed approach in term of magnetic distribution. Findings: For both studied cases, results in term of local and global physical quantities show good agreement between the real stator modelling and the proposed approach. Originality/value: Current sheet is used with finite element model to study the inherent effect of different winding configurations on local and global physical quantities of an AC electrical machine. The proposed approach avoids the constraints in terms of stator slot geometry and electrical circuit definition. This is very useful to quickly test different winding configurations or to isolate a specific winding space harmonic to quantify its effect on the electrical performances. This cannot be performed using classical modelling as all space harmonics are taken into account. [ABSTRACT FROM AUTHOR]

This paper reviews significant changes relevant to data/comm cables in the 2017 National Electrical Code®. The most significant changes address the use of local area network (LAN) cables for simultaneously powering and communicating/signaling with equipment using powering schemes such as Power over Ethernet (PoE) and HDBaseT. The primary safety issue, overheating of the cables, is addressed by requiring that the current in the conductors not exceed the ampacity of the conductors and the temperature of the cables not exceed the cable temperature rating. There are new requirements related to temperature ratings and marking of data/comm cables. An ampacity table, which includes derating to account for heat build-up in cable bundles, has been introduced for the fine wire gauges (22-26) used in LAN cables. A new type of data/comm cable has been introduced, a "limited-power" cable, which has a listed ampacity. Other changes relevant to data/comm cables include informational notes (actually a warning) about the consequences of painting cables and new provisions to permit the installation of undercarpet communications cables under modular flooring. [ABSTRACT FROM AUTHOR]

Purpose A saturated iron core superconducting fault current limiter (SISFCL) has an important role to play in the present-day power system, providing effective protection against electrical faults and thus ensuring an uninterrupted supply of electricity to the consumers. Previous mathematical models developed to describe the SISFCL use a simple flux density-magnetic field intensity curve representing the ferromagnetic core. As the magnetic state of the core affects the efficient working of the device, this paper aims to present a novel approach in the mathematical modeling of the device with the inclusion of hysteresis.Design/methodology/approach The Jiles–Atherton’s hysteresis model is utilized to develop the mathematical model of the limiter. The model is numerically solved using MATLAB. To support the validity of model, finite element model (FEM) with similar specifications was simulated.Findings Response of the limiter based on the developed mathematical model is in close agreement with the FEM simulations. To illustrate the effect of the hysteresis, the responses are compared by using three different hysteresis characteristics. Harmonic analysis is performed and comparison is carried out utilizing fast Fourier transform and continuous wavelet transform. It is observed that the core with narrower hysteresis characteristic not only produces a better current suppression but also creates a higher voltage drop across the DC source. It also injects more harmonics in the system under fault condition.Originality/value Inclusion of hysteresis in the mathematical model presents a more realistic approach in the transient analysis of the device. The paper provides an essential insight into the effect of the core hysteresis characteristic on the device performance. [ABSTRACT FROM AUTHOR]

High-mileage, multi-hour motorsport thattests the stamina of cars, of drivers, and ofspectators' abilities to keep drinking. European New Car Assessment Programme.Standardised car safety testing regime,founded in 1996 and whipped into shape byfirst chairman Max Mosley. Also the name for thesmall piece of paper left under the wipers ofcars such as the Aston Martin DBS, JaguarF-type and Ford Mustang V8 reading, 'Canyou PLEASE not start your car so loudly soearly in the morning. Sounds more excitingthan the cars it's sometimes attached to, e.g.Hyundai i30 Fastback, Rover 800 Fastback. [Extracted from the article]

In this paper, a generalization of the concept of electrical power for periodic current and voltage waveforms based on a new generalized complex geometric algebra (GCGA) is proposed. This powerful tool permits, in n-sinusoidal/nonlinear situations, representing and calculating the voltage, current, and apparent power in a single-port electrical network in terms of multi vectors. The new expressions result in a novel representation of the apparent power, similar to the Steinmetz's phasor model, based on complex numbers, but limited to the purely sinusoidal case. The multivectorial approach presented is based on the frequency-domain decomposition of the apparent power into three components: the real part and the imaginary part of the complex-scalar associated to active and reactive power respectively, and distortion power, associated to the complex-bivector. A geometrical interpretation of the multivectorial components of apparent power is discussed. Numerical examples illustrate the clear advantages of the suggested approach. [ABSTRACT FROM AUTHOR]

Scaling of Silicon transistors continue in the sub 100-nm regime amidst severe roadblocks. Increased short-channel effects, rising leakage currents, severe process parameter variations are only a few of the overwhelming challenges that the device and circuit designers are faced with. In an attempt to alleviate the problems associated with the scaling of silicon transistors, researchers have began a quest for novel alternate materials in a post-Si nanoelectronics era. Of the different materials investigated so far, carbon nanotubes with their superior transport properties, excellent thermal conductivities and high current handling capacities have proved to be a potential heir to Si. This paper reviews the promise of carbon nanotube field-effect transistors as future devices for high-performance as well as low-power electronics. [ABSTRACT FROM AUTHOR]

Switched circuits are widely used, particularly for power electronic applications in which efficiency is important. Of these applications, the class-E amplifier has been given particular attention, since it is theoretically a 100%-efficient switched circuit that has been successfully demonstrated in applications such as ballasts, converters, frequency multipliers, and communication amplifiers at frequencies as high as 10 GHz. However, with increasing power or frequency, nonlinearities become extremely important, for instance, in order to achieve actual class-E operation and even to avoid destruction of the switching device. In this paper, a new method for determining the steady-state response of nonlinear circuits containing ideal switches is proposed. While the method is more general, the description is based on the class-E amplifier because of its inherent interest. The method is based on a time-domain Gear discretization of the circuit equations. A technique for determining the initial samples of the discretized equation of each topology is developed, based on the fact that state variables are constant during switching. Finally, assuming a periodic steady-state, a single algebraic system of nonlinear equations is obtained in which the unknowns are the samples of the control variable of the nonlinearity in the whole signal period. To validate the method described, a comparison with PSpice simulations is provided. [ABSTRACT FROM AUTHOR]

Purpose - The purpose of this paper is to present a practical method for computing contingency-based reliability and quality indices in power systems and to answer questions related to how much the system is reliable, how robust it is in surviving random contingencies, how much it is costing to maintain appropriate system security and reliability levels and, finally, to what extent the desired balance is maintained between generation facilities, transmission capabilities and consumer demand levels in various zones of the electric power system. Design/methodology/approach - The methodology adopted in this paper is based on a combined contingency analysis/reliability evaluation scheme. A three-component system model is utilized, which can be used effectively for evaluation and sensitivity analysis of reliability and quality in power systems. The model is a reduced (equivalent) system representation that comprises generation, transmission and load components with multi-state values. The computational scheme presented in the paper integrates both the contingency effect and its probability of occurrence into one routine of analysis while reducing the power system around the region of interest. Findings - The computational scheme presented in the paper can effectively assess both service reliability and system quality. The practical applications presented demonstrated that lower service reliability levels would jeopardize energy supply continuity and increase the likelihood of additional maintenance and restoration costs due to the resulting higher rate of system outages. Poor system quality levels, on the other hand, imply either deficiency or excess in the overall system capabilities as designed by its planners. Originality/value - The work of this paper contributes to the solution of the reliability and quality assessment problem in practical power systems. As part of the present work, an advanced computerized scheme for fast composite system reliability and quality assessment was developed and then applied to an equivalent system model of the Saudi electricity system. The results obtained are claimed to have far-reaching implications on various planning and operation aspects of the power system. [ABSTRACT FROM AUTHOR]

This paper presents a partially switched-opamp technique for a high-speed, low-power pipelined analog-to-digital converter (ADC). Unlike a conventional switched-opamp technique, only the second stage of a two-stage opamp is switched with the enhanced power efficiency and the drawbacks of an opamp sharing technique and a conventional switched-opamp technique are addressed. The prototype of 8-bit 200-MS/s pipelined ADC is implemented in a 0.18-μm CMOS process technology. This converter achieves 55.8-dB spurious free dynamic range, 47.3-dB signal-to-noise-plus-distortion ratio, 7.68 effective number of bits for a 90-MHz input at full sampling rate, and consumes 30-mW from a 1.8-V supply. The active area of the ADC is 0.15 mm². [ABSTRACT FROM AUTHOR]

In this paper, a basic cell for low-power and/or low- voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits. [ABSTRACT FROM AUTHOR]

This paper presents an analysis of the effect of duty ratio on power loss and efficiency of the C1ass-E amplifier. Conduction loss for each Class-E circuit component is derived and total amplifier losses and efficiency are expressed as functions of duty ratio. Two identical 300-W Class-E amplifiers operating at 7.29 MHz are designed, constructed, and tested in the laboratory. Dependence of total efficiency upon duty ratio when using real components is derived and verified experimentally. Derived loss and efficiency equations demonstrate rapid drop in efficiency for low duty ratio (below approximately 30%). Experimental results very closely matched calculated power loss and efficiency. [ABSTRACT FROM AUTHOR]

Reconstruction of chaotic dynamics from its time-series measurement is an important problem for many engineering applications. In this paper, we propose using a novel multiple model (MM) predictor based on a genetic algorithm (GA) to reconstruct piecewise chaotic dynamics. The motivation relies on the observation that conventional single model is usually unable to reconstruct the piecewise dynamics properly because a piecewise map is nonsmooth. In our approach, multiple radial basis function (RBF) neural predictors are used to model the piecewise dynamic in different partition intervals. Switching between different intervals could be estimated by a nonlinear gate model. In particular, a GA is employed here to train the MM and to obtain the optimal RBF parameters. Compared to conventional chaos dynamic reconstruction techniques, the proposed GA-MM method is shown to greatly improve the reconstruction performance for piecewise chaotic dynamics. The superiority is further verified by applying the GA-MM method to model the real-life radar sea-clutter signal obtained from Nova Scotia (NS), Canada, and to predict the electric power pool price time series from Alberta (AB), Canada. Both kinds of real data show that the GA-MM is effective in building a dynamical model. The proposed GA-MM method is also applied to the channel equalization problem of chaos communication systems. Based on the minimum nonlinear prediction error equalization method, it is shown that the GA-MM method has a satisfactory equalization performance even under strong channel effects. [ABSTRACT FROM AUTHOR]