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For years there has been a call to increase remote work, conferencing, and education. Although many companies have geographically distributed teams and students have moved to online instruction, remote working and learning has yet to become the norm despite the available technology and resources. Remote work and education provide positive environmental benefits as well as improved work-life integration and flexibility. Today, key challenges include effective communication, laboratories, isolation, and privacy. Being at the forefront of innovation, our community often leads technology adoption. In this special event, we explore how to shape the inevitable shift to more distributed and remote styles of working and learning.

FPMax implements four FPUs optimized for latency or throughput workloads in two precisions, fabricated in 28nm UTBB FDSOI. Each unit's parameters, e.g pipeline stages, booth encoding etc., were optimized to yield 1.42ns latency at 110GLOPS/W (SP) and 1.39ns latency at 36GFLOPS/W (DP). At 100% activity, body-bias control improves the energy efficiency by about 20%; at 10% activity this saving is almost 2x. Keywords: FPU, energy efficiency, hardware generator, SOI

This report explores a new way to think about designing digital systems, creating chip generators rather than chips, to resolve the crisis facing the chip industry: the need for high energy efficiency pushes us to create customized computing devices tailored to the user's application, while the high cost of design pushes us to using generic computing solutions. Our research indicates that customized solutions can be orders of magnitude better, and that creating a chip generator requires changing the way we think and code hardware, but should be feasible., Sponsored in part by DARPA IPTO.