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In recent years, light-emitting diode (LED) technology has been rapidly gaining market share in the general lighting market around the world. To meet the demands of general lighting applications, the output power of LEDs has substantially increased. However, this also results in more heat being generated, which may be detrimental to the performance and the reliability of LEDs. Flip-chip packaging has been identified as a first-level interconnect method which offers both improved light extraction and better thermal management than conventional wire-bonded LEDs. Bump interconnects together with underfill encapsulation have been recently explored as a packaging method for flip-chip LEDs (FCLED). Existing studies which concern bump interconnects and highly thermally conductive underfill claim that increasing the thermal conductivity of the underfill material can be an effective method to reduce the thermal resistance of FCLEDs. However, in the capillary underfill dispensing process, an underfill fillet which covers the side of the FCLED chip is unavoidable. This effect has not yet been considered in the literature. To address this concern, the present study strived to provide insight into side-wall light absorption by underfill fillets, and to demonstrate a means by which this issue can be remedied. In the current research, a thermally conductive underfill material was fabricated. This was accomplished by loading an epoxy material with highly thermally conductive fillers. The fabricated underfill materials were then characterized thermally and tested for moisture resistance. A volume-optimized underfill dispensing method was then implemented, whereby a void-free underfill encapsulation was achieved for sample preparation. Subsequently, the issue of side-wall light emission absorption was investigated. Reduction of radiant power as a result of opaque underfill fillets was studied, followed by another demonstration which showed filler particles in epoxy did absorb the emi

Optoelectronic Integrated circuits (OEICs) have found many applications in short-distance communication, intelligent displays and sensing. With the increasing demand for higher speed, more functions and higher integration level, the silicon based OEIC shows weaknesses due to the limit set by the silicon material properties. Thus, researchers are trying to find alternative solutions in compound semiconductors. Benefiting from the mature technology of GaN devices (LED, HEMT, etc.) and the reliable and robust properties of III-nitride semiconductor itself, III-nitride materials show great potential to serve as an integrated optoelectronic platform. However, until now, only few works have been done on the monolithic integration of GaN devices. So more research works are still needed to further increase the integration level and add more functions to the GaN-based integrated optoelectronic circuit. In this thesis, we are focusing on developing the monolithically integrated GaN devices for lighting and detection applications. To achieve this, we first integrate discrete LEDs in series into a flip-chip high voltage LED (HVLED) to serve as an effective light source. During the fabrication process, we develop a curable-polymer trench-filling technique. Our HVLED shows small forward voltage variation, uniform light emission, linear light output, and stable thermal performance. When using the HVLED in a low-flicker lighting system, the lighting system shows a flicker percentage as low as 17%. At the same time, we also try a pre-annealed Ni/Ag scheme to replace the conventional ITO scheme as the p-GaN contact and achieve a great improvement (22%~27%) in efficiency. Then we integrate an LED with a GaN HEMT to achieve a fast modulated voltage-controlled light emitter, namely the HEMT-LED device, for light signal transmitting and light intensity dimming functions. Furthermore, we integrate a GaN HEMT with a metal-semiconductor-metal photodiode (MSM-PD) and other on-wafer passive c

In recent years, light-emitting diode (LED) technology has been rapidly gaining market share in the general lighting market around the world. To meet the demands of general lighting applications, the output power of LEDs has substantially increased. However, this also results in more heat being generated, which may be detrimental to the performance and the reliability of LEDs. Flip-chip packaging has been identified as a first-level interconnect method which offers both improved light extraction and better thermal management than conventional wire-bonded LEDs. Bump interconnects together with underfill encapsulation have been recently explored as a packaging method for flip-chip LEDs (FCLED). Existing studies which concern bump interconnects and highly thermally conductive underfill claim that increasing the thermal conductivity of the underfill material can be an effective method to reduce the thermal resistance of FCLEDs. However, in the capillary underfill dispensing process, an underfill fillet which covers the side of the FCLED chip is unavoidable. This effect has not yet been considered in the literature. To address this concern, the present study strived to provide insight into side-wall light absorption by underfill fillets, and to demonstrate a means by which this issue can be remedied. In the current research, a thermally conductive underfill material was fabricated. This was accomplished by loading an epoxy material with highly thermally conductive fillers. The fabricated underfill materials were then characterized thermally and tested for moisture resistance. A volume-optimized underfill dispensing method was then implemented, whereby a void-free underfill encapsulation was achieved for sample preparation. Subsequently, the issue of side-wall light emission absorption was investigated. Reduction of radiant power as a result of opaque underfill fillets was studied, followed by another demonstration which showed filler particles in epoxy did absorb the emi

Optoelectronic Integrated circuits (OEICs) have found many applications in short-distance communication, intelligent displays and sensing. With the increasing demand for higher speed, more functions and higher integration level, the silicon based OEIC shows weaknesses due to the limit set by the silicon material properties. Thus, researchers are trying to find alternative solutions in compound semiconductors. Benefiting from the mature technology of GaN devices (LED, HEMT, etc.) and the reliable and robust properties of III-nitride semiconductor itself, III-nitride materials show great potential to serve as an integrated optoelectronic platform. However, until now, only few works have been done on the monolithic integration of GaN devices. So more research works are still needed to further increase the integration level and add more functions to the GaN-based integrated optoelectronic circuit. In this thesis, we are focusing on developing the monolithically integrated GaN devices for lighting and detection applications. To achieve this, we first integrate discrete LEDs in series into a flip-chip high voltage LED (HVLED) to serve as an effective light source. During the fabrication process, we develop a curable-polymer trench-filling technique. Our HVLED shows small forward voltage variation, uniform light emission, linear light output, and stable thermal performance. When using the HVLED in a low-flicker lighting system, the lighting system shows a flicker percentage as low as 17%. At the same time, we also try a pre-annealed Ni/Ag scheme to replace the conventional ITO scheme as the p-GaN contact and achieve a great improvement (22%~27%) in efficiency. Then we integrate an LED with a GaN HEMT to achieve a fast modulated voltage-controlled light emitter, namely the HEMT-LED device, for light signal transmitting and light intensity dimming functions. Furthermore, we integrate a GaN HEMT with a metal-semiconductor-metal photodiode (MSM-PD) and other on-wafer passive c

In recent years, light-emitting diode (LED) technology has been rapidly gaining market share in the general lighting market around the world. To meet the demands of general lighting applications, the output power of LEDs has substantially increased. However, this also results in more heat being generated, which may be detrimental to the performance and the reliability of LEDs. Flip-chip packaging has been identified as a first-level interconnect method which offers both improved light extraction and better thermal management than conventional wire-bonded LEDs. Bump interconnects together with underfill encapsulation have been recently explored as a packaging method for flip-chip LEDs (FCLED). Existing studies which concern bump interconnects and highly thermally conductive underfill claim that increasing the thermal conductivity of the underfill material can be an effective method to reduce the thermal resistance of FCLEDs. However, in the capillary underfill dispensing process, an underfill fillet which covers the side of the FCLED chip is unavoidable. This effect has not yet been considered in the literature. To address this concern, the present study strived to provide insight into side-wall light absorption by underfill fillets, and to demonstrate a means by which this issue can be remedied. In the current research, a thermally conductive underfill material was fabricated. This was accomplished by loading an epoxy material with highly thermally conductive fillers. The fabricated underfill materials were then characterized thermally and tested for moisture resistance. A volume-optimized underfill dispensing method was then implemented, whereby a void-free underfill encapsulation was achieved for sample preparation. Subsequently, the issue of side-wall light emission absorption was investigated. Reduction of radiant power as a result of opaque underfill fillets was studied, followed by another demonstration which showed filler particles in epoxy did absorb the emi

Optoelectronic Integrated circuits (OEICs) have found many applications in short-distance communication, intelligent displays and sensing. With the increasing demand for higher speed, more functions and higher integration level, the silicon based OEIC shows weaknesses due to the limit set by the silicon material properties. Thus, researchers are trying to find alternative solutions in compound semiconductors. Benefiting from the mature technology of GaN devices (LED, HEMT, etc.) and the reliable and robust properties of III-nitride semiconductor itself, III-nitride materials show great potential to serve as an integrated optoelectronic platform. However, until now, only few works have been done on the monolithic integration of GaN devices. So more research works are still needed to further increase the integration level and add more functions to the GaN-based integrated optoelectronic circuit. In this thesis, we are focusing on developing the monolithically integrated GaN devices for lighting and detection applications. To achieve this, we first integrate discrete LEDs in series into a flip-chip high voltage LED (HVLED) to serve as an effective light source. During the fabrication process, we develop a curable-polymer trench-filling technique. Our HVLED shows small forward voltage variation, uniform light emission, linear light output, and stable thermal performance. When using the HVLED in a low-flicker lighting system, the lighting system shows a flicker percentage as low as 17%. At the same time, we also try a pre-annealed Ni/Ag scheme to replace the conventional ITO scheme as the p-GaN contact and achieve a great improvement (22%~27%) in efficiency. Then we integrate an LED with a GaN HEMT to achieve a fast modulated voltage-controlled light emitter, namely the HEMT-LED device, for light signal transmitting and light intensity dimming functions. Furthermore, we integrate a GaN HEMT with a metal-semiconductor-metal photodiode (MSM-PD) and other on-wafer passive c

Light emitting diodes (LED) have been rapidly developed in the past decades. In recent years, LEDs of the flip-chip structure attracted great attention from the LED manufacturers for its simpler manufacturing processes, better performance, and higher reliability. According to the flip-chip structure, the active layer is directly attached to the chip carrier. The bonding layer acts as a thermal interface. Therefore, this bonding layer plays a critical role in the LED performance. But in reality, due to the packaging design or manufacturing defect, it is impractical to guarantee a bonding layer of the full chip area and the partial bonding which only occupies part of the chip area will consequently influence the uniformity of the thermal state across the LED chip and generate the non-uniform junction temperature. Since the junction temperature is one of the dominating factors of the performance of an LED device, it is necessary to investigate such phenomenon. The non-uniform junction temperature issues in the flip-chip LED have been reported in several papers. One of the key issues concerns about the measurement of the non-uniform junction temperature distribution. The measurement is usually accomplished by the thermography technique. However, there is no literature quantitatively reporting the characterization about the distribution of temperature. Furthermore, although the published literature has mentioned the current crowding effect from the non-uniform junction temperature, seldom of them quantified this current crowding effect. In order to address all these questions and enhance the understanding of the non-uniform junction temperature in flip-chip LED, this study will focus on developing the characterization methods for the non-uniform junction temperature and developing models for the chip behavior relates to the non-uniform junction. Firstly, the fabrication of the test vehicles in this study will be given in detail. Different commercial flip-chip LEDs are us

Light emitting diodes (LED) have been rapidly developed in the past decades. In recent years, LEDs of the flip-chip structure attracted great attention from the LED manufacturers for its simpler manufacturing processes, better performance, and higher reliability. According to the flip-chip structure, the active layer is directly attached to the chip carrier. The bonding layer acts as a thermal interface. Therefore, this bonding layer plays a critical role in the LED performance. But in reality, due to the packaging design or manufacturing defect, it is impractical to guarantee a bonding layer of the full chip area and the partial bonding which only occupies part of the chip area will consequently influence the uniformity of the thermal state across the LED chip and generate the non-uniform junction temperature. Since the junction temperature is one of the dominating factors of the performance of an LED device, it is necessary to investigate such phenomenon. The non-uniform junction temperature issues in the flip-chip LED have been reported in several papers. One of the key issues concerns about the measurement of the non-uniform junction temperature distribution. The measurement is usually accomplished by the thermography technique. However, there is no literature quantitatively reporting the characterization about the distribution of temperature. Furthermore, although the published literature has mentioned the current crowding effect from the non-uniform junction temperature, seldom of them quantified this current crowding effect. In order to address all these questions and enhance the understanding of the non-uniform junction temperature in flip-chip LED, this study will focus on developing the characterization methods for the non-uniform junction temperature and developing models for the chip behavior relates to the non-uniform junction. Firstly, the fabrication of the test vehicles in this study will be given in detail. Different commercial flip-chip LEDs are us

Light emitting diodes (LED) have been rapidly developed in the past decades. In recent years, LEDs of the flip-chip structure attracted great attention from the LED manufacturers for its simpler manufacturing processes, better performance, and higher reliability. According to the flip-chip structure, the active layer is directly attached to the chip carrier. The bonding layer acts as a thermal interface. Therefore, this bonding layer plays a critical role in the LED performance. But in reality, due to the packaging design or manufacturing defect, it is impractical to guarantee a bonding layer of the full chip area and the partial bonding which only occupies part of the chip area will consequently influence the uniformity of the thermal state across the LED chip and generate the non-uniform junction temperature. Since the junction temperature is one of the dominating factors of the performance of an LED device, it is necessary to investigate such phenomenon. The non-uniform junction temperature issues in the flip-chip LED have been reported in several papers. One of the key issues concerns about the measurement of the non-uniform junction temperature distribution. The measurement is usually accomplished by the thermography technique. However, there is no literature quantitatively reporting the characterization about the distribution of temperature. Furthermore, although the published literature has mentioned the current crowding effect from the non-uniform junction temperature, seldom of them quantified this current crowding effect. In order to address all these questions and enhance the understanding of the non-uniform junction temperature in flip-chip LED, this study will focus on developing the characterization methods for the non-uniform junction temperature and developing models for the chip behavior relates to the non-uniform junction. Firstly, the fabrication of the test vehicles in this study will be given in detail. Different commercial flip-chip LEDs are us

Remarkable development of light emitting diodes (LEDs) has driven its commercialization in large area displays and general lighting. The use of LEDs in micro-display is rare but recently attracting more attention. LEDs have advantages in terms of efficiency, brightness, lifetime, temperature stability and robustness, compared with other existing micro-display technologies. In the dissertation, novel fabrication processes and device structures of LEDs and micro-displays were explored to overcome their technological bottlenecks. Conventional flip-chip LEDs have problem of current crowding near n-electrode, causing significant brightness degradation at high current injection. We propose a point-contact flip-chip LED, where high density and small n-contacts reduce lateral current spreading distance, improving forward voltage of FCLEDs. Meanwhile the brightness was improved by light extraction enhancement from high density deeply etched holes. Although LED micro-displays have been intensively investigated, high resolution micro-display with decent visual quality is yet to be realized. Non-optimized bumping technology and bowing of micro-LED array causing difficulty in flip-chip bonding are the major issues. Two different approaches were proposed to demonstrate high resolution micro-displays with much better bonding yield. This was successfully demonstrated in a 1700 pixel per inch (PPI) passive-matrix micro-LED array bonded on ASIC. Indium bumps were relocated to the peripheral areas of the chip so that the bumps can be bigger and more spread out. Moreover, significant reduction of bump density in passive-matrix configuration improves bonding reliability. In designing the 400 × 240 active-matrix LED micro-display, the sapphire substrate of the micro-LED array was intended to be as thick as its original to suppress chip bowing, maximizing the coplanarity between micro-LED array and silicon pixel driver. Realization of full color LED micro-display have been a big challenge

Remarkable development of light emitting diodes (LEDs) has driven its commercialization in large area displays and general lighting. The use of LEDs in micro-display is rare but recently attracting more attention. LEDs have advantages in terms of efficiency, brightness, lifetime, temperature stability and robustness, compared with other existing micro-display technologies. In the dissertation, novel fabrication processes and device structures of LEDs and micro-displays were explored to overcome their technological bottlenecks. Conventional flip-chip LEDs have problem of current crowding near n-electrode, causing significant brightness degradation at high current injection. We propose a point-contact flip-chip LED, where high density and small n-contacts reduce lateral current spreading distance, improving forward voltage of FCLEDs. Meanwhile the brightness was improved by light extraction enhancement from high density deeply etched holes. Although LED micro-displays have been intensively investigated, high resolution micro-display with decent visual quality is yet to be realized. Non-optimized bumping technology and bowing of micro-LED array causing difficulty in flip-chip bonding are the major issues. Two different approaches were proposed to demonstrate high resolution micro-displays with much better bonding yield. This was successfully demonstrated in a 1700 pixel per inch (PPI) passive-matrix micro-LED array bonded on ASIC. Indium bumps were relocated to the peripheral areas of the chip so that the bumps can be bigger and more spread out. Moreover, significant reduction of bump density in passive-matrix configuration improves bonding reliability. In designing the 400 × 240 active-matrix LED micro-display, the sapphire substrate of the micro-LED array was intended to be as thick as its original to suppress chip bowing, maximizing the coplanarity between micro-LED array and silicon pixel driver. Realization of full color LED micro-display have been a big challenge

Remarkable development of light emitting diodes (LEDs) has driven its commercialization in large area displays and general lighting. The use of LEDs in micro-display is rare but recently attracting more attention. LEDs have advantages in terms of efficiency, brightness, lifetime, temperature stability and robustness, compared with other existing micro-display technologies. In the dissertation, novel fabrication processes and device structures of LEDs and micro-displays were explored to overcome their technological bottlenecks. Conventional flip-chip LEDs have problem of current crowding near n-electrode, causing significant brightness degradation at high current injection. We propose a point-contact flip-chip LED, where high density and small n-contacts reduce lateral current spreading distance, improving forward voltage of FCLEDs. Meanwhile the brightness was improved by light extraction enhancement from high density deeply etched holes. Although LED micro-displays have been intensively investigated, high resolution micro-display with decent visual quality is yet to be realized. Non-optimized bumping technology and bowing of micro-LED array causing difficulty in flip-chip bonding are the major issues. Two different approaches were proposed to demonstrate high resolution micro-displays with much better bonding yield. This was successfully demonstrated in a 1700 pixel per inch (PPI) passive-matrix micro-LED array bonded on ASIC. Indium bumps were relocated to the peripheral areas of the chip so that the bumps can be bigger and more spread out. Moreover, significant reduction of bump density in passive-matrix configuration improves bonding reliability. In designing the 400 × 240 active-matrix LED micro-display, the sapphire substrate of the micro-LED array was intended to be as thick as its original to suppress chip bowing, maximizing the coplanarity between micro-LED array and silicon pixel driver. Realization of full color LED micro-display have been a big challenge

Quad Data Rate SRAMS (QDR SRAM) with a maximum speed of 550MHz are the latest technology QDRs in the market. These devices use the traditional wire-bonding interconnects ball grid array package technology with about 165 signal pins. There are next generation QDR SRAMS that are being designed which operates at speeds much higher than 550MHz and signal pins twice as much as that of the present QDRs. These new products would require a new packaging interconnect technology called Flip Chip in order to accommodate higher speed and increased number of signal pins. The reason for this is that Flip Chip shows improved electrical properties over wire-bonding technologies. In this thesis, we deal with the qualification of Flip Chip interconnects technology for a higher pin count device.

Monolithic III-nitride based LED micro-arrays offer many potential applications due totheir superior characteristics such as high brightness, long lifetime and high contrast. In previously developed passive addressable LED micro-arrays, display dimensions and pixel brightness were limited by the loading effect in the same row or column. Therefore, a new addressing scheme and fabrication technology are needed to improve the operation effectiveness of the LED micro-arrays. In this thesis, III-nitride based light emitting diodes on silicon (LEDoS) displays were designed and fabricated by integrating LED micro-arrays and active matrix substrates through Flip-Chip technology. An active matrix driving scheme was designed to provide sufficient drive capability and individual controllability of each LED pixel. Three generations of the LEDoS displays were introduced and demonstrated. Firstly, an 8×8 monolithic LEDoS display was fabricated with an emission wavelength of 440nm. The pixel size was 300μm by 300μm in a square shape with a 350μm pitch. The LEDoS display panel was measured by applying scan and data signals, demonstrating sufficient driving capability for the LED micro-array. Secondly, an 8×8 LED micro-array unit was designed as a basic module. With this module, the LEDoS display panel can be scaled up to 16×16, 24×24 or even bigger according to full-custom designs of the active matrix substrates. Forward voltage uniformity of the LED pixels was greatly improved using a novel double-ground structure. Red, green and blue phosphors were applied on the top of the LEDoS panel to realize a full-color display. Thirdly, high-resolution and fine-pixel LED micro-arrays were designed with either 30×30 or 60×60 pixels on a single chip. The circular shape pixels had diameter of diameter of 100μm in 140μm pitch and 50μm in 70μm pitch, respectively. With a peripheral driving board, the LEDoS micro-display panel was programmed row by row and column by column individually. Represen