62 results on '"Yavari M."'
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2. A novel low phase noise and low power DCO in 90 nm CMOS technology for ADPLL application
3. Realization of the 2nd-order NTF enhancement in a time-encoded continuous-time sigma-delta modulator using passive elements
4. Origin of Transfer Faults in the Fars Folded Belt, Zagros Mountains
5. Analysis of carrier and photon dynamic effects on the modulation behaviour of self assembled quantum dot lasers
6. Circuit model for segmented traveling-wave electroabsorption modulators
7. Soliton solution of nonlinear Schrodinger equation with application to Bose-Einstein condensation using the FD method
8. Analysis of photon density distribution in three section DBR tunable laser diode
9. Development and evaluation of a web-based training technique for preparation of participants in an outcomes research practicum
10. Double-Sampling Single-Loop Sigma-Delta Modulator Topologies for Broadband Applications
11. Systematic and optimal design of CMOS two-stage opamps with hybrid cascode compensation
12. Minimum detectable capacitance in capacitive readout circuits.
13. A 2.2GHz high-swing class-C VCO with wide tuning range.
14. A new control method for shunt active filters based on sinusoidal signal integrators.
15. A 10-Bit 100-MSample/s pipelined analog-to-digital converter using digital calibration technique.
16. A 10-bit 250MS/s pipelined ADC with a merged S/H & 1st stage using an optimal opamp sharing technique.
17. A MATLAB toolbox synthesizing reconfigurable delta-sigma modulators for multi-standard wireless applications.
18. A novel digital background calibration technique for pipelined ADCs.
19. Hybrid CT/DT resonation-based cascade ΣΔ modulators for broadband low-voltage applications.
20. A digital background correction technique combined with DWA for DAC mismatch errors in multibit ΣΔ ADCs.
21. A double-sampled hybrid CT/DT SMASH ΣΔ modulator for wideband applications.
22. Low voltage low power techniques in design of zero IF CMOS receivers.
23. A new architecture for low-power high-speed pipelined ADCs using double-sampling and opamp-sharing techniques.
24. A systematic design procedure for CMOS three-stage NMC amplifiers.
25. MASH sigma-delta modulators with reduced sensitivity to the circuit non-idealities.
26. Multirate double-sampling hybrid CT/DT sigma-delta modulators for wideband applications.
27. On the design of a less jitter sensitive NTF for NRZ multi-bit continuous-time ΔΣ modulators.
28. A noise-canceling CMOS LNA design for the upper band of UWB DS-CDMA receivers.
29. Soliton solution of nonlinear Schrodinger equation with application to Bose-Einstein condensation using the FD method.
30. Circuit model for segmented traveling-wave electroabsorption modulators.
31. Analysis of photon density distribution in three section DBR tunable laser diode.
32. A novel topology in reversed nested miller compensation using dual-active capacitance.
33. A novel topology in RNMC amplifiers with single miller compensation capacitor.
34. Accurate and simple modeling of amplifier dc gain nonlinearity in switched-capacitor circuits.
35. A novel fully-differential class AB folded-cascode OTA for switched-capacitor applications.
36. A 3.3 V high-resolution sigma-delta modulator for digital audio
37. Hybrid Cascode Compensation for Two-Stage CMOS Operational Amplifiers
38. Double-Sampled Cascaded Sigma-Delta Modulator Topologies for Low Oversampling Ratios
39. A 10-bit 150-MS/s, parallel pipeline A/D converter in 0.6-μm CMOS
40. A six-order wideband bandpass sigma-delta modulator
41. A 3.3-V 18-bit digital audio Sigma-Delta modulator in 0.6-μm CMOS
42. A new compensation technique for two-stage CMOS operational transconductance amplifiers
43. A very low-voltage, low-power and high resolution sigma-delta modulator for digital audio in 0.25-μm CMOS
44. High-Order Single-Loop Double-Sampling Sigma-Delta Modulator Topologies for Broadband Applications
45. A wideband dual-mode VCO with analog and digital automatic amplitude control circuitry.
46. A Linear wideband CMOS LNA for 3–5 GHZ UWB systems.
47. Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios.
48. High-order single-loop double-sampling sigma-delta modulator topologies for broadband applications.
49. Hybrid cascode compensation for two-stage CMOS operational amplifiers.
50. An analytical model for the slewing behavior of CMOS two-stage operational transconductance amplifiers.
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