115 results on '"Weichen Liu"'
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2. Pearls Hide Behind Linearity: Simplifying Deep Convolutional Networks for Embedded Hardware Systems via Linearity Grafting.
3. FedTR: Federated Learning Framework with Transfer Learning for Industrial Visual Inspection.
4. iMAT: Energy-Efficient In-Memory Acceleration for Ternary Neural Networks With Sparse Dot Product.
5. Human motion trajectory generation based on AWR1642.
6. An Efficient Sparse LSTM Accelerator on Embedded FPGAs with Bandwidth-Oriented Pruning.
7. Crossbar-Aligned & Integer-Only Neural Network Compression for Efficient in-Memory Acceleration.
8. MUGNoC: A Software-Configured Multicast-Unicast-Gather NoC for Accelerating CNN Dataflows.
9. Accelerating Gustavson-based SpMM on Embedded FPGAs with Element-wise Parallelism and Access Pattern-aware Caches.
10. Efficient Response Time Bound for Typed DAG Tasks.
11. FIONA: Fine-grained Incoherent Optical DNN Accelerator Search for Superior Efficiency and Robustness.
12. Towards Efficient Convolutional Neural Network for Embedded Hardware via Multi-Dimensional Pruning.
13. A DirectX-Based DICOM Viewer for Multi-user Surgical Planning in Augmented Reality.
14. Smart Scissor: Coupling Spatial Redundancy Reduction and CNN Compression for Embedded Hardware.
15. iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations.
16. Collate: Collaborative Neural Network Learning for Latency-Critical Edge Systems.
17. HACScale: Hardware-Aware Compound Scaling for Resource-Efficient DNNs.
18. You only search once: on lightweight differentiable architecture search for resource-constrained embedded platforms.
19. EMNAPE: Efficient Multi-Dimensional Neural Architecture Pruning for EdgeAI.
20. A Cryptocurrency Price Prediction Model Based on Twitter Sentiment Indicators.
21. Optimized Data Reuse via Reordering for Sparse Matrix-Vector Multiplication on FPGAs.
22. Parallel Multipath Transmission for Burst Traffic Optimization in Point-to-Point NoCs.
23. HSCoNAS: Hardware-Software Co-Design of Efficient DNNs via Neural Architecture Search.
24. Efficient AUTOSAR-Compliant CAN-FD Frame Packing with Observed Optimality.
25. Partial order based non-preemptive communication scheduling towards real-time networks-on-chip.
26. ZeroBN: Learning Compact Neural Networks For Latency-Critical Edge Systems.
27. Person Re-Identification Via Pose-Aware Multi-Semantic Learning.
28. Occlusion-Aware GAN for Face De-Occlusion in the Wild.
29. Load-aware Adaptive Cache Management Scheme for Enterprise-level Stackable Cryptographic File System*.
30. Mobi-PMFS: An Efficient and Durable In-Memory File System for Mobile Devices.
31. COSMA: An Efficient Concurrency-Oriented Space Management Scheme for In-memory File Systems.
32. EdgeNAS: Discovering Efficient Neural Architectures for Edge Systems.
33. XOR-Net: An Efficient Computation Pipeline for Binary Neural Network Inference on Edge Devices.
34. Contention Minimized Bypassing in SMART NoC.
35. Co-Exploring Neural Architecture and Network-on-Chip Design for Real-Time Artificial Intelligence.
36. MindReading: An Ultra-Low-Power Photonic Accelerator for EEG-based Human Intention Recognition.
37. LightBulb: A Photonic-Nonvolatile-Memory-based Accelerator for Binarized Convolutional Neural Networks.
38. Lightweight Thermal Monitoring in Optical Networks-on-Chip via Router Reuse.
39. Mitigation of Tampering Attacks for MR-Based Thermal Sensing in Optical NoCs.
40. Evaluation of Low-end Virtual Reality Content of Cultural Heritage: A Preliminary Study with Eye Movement.
41. Work-in-Progress: What to Expect of Early Training Statistics? An Investigation on Hardware-Aware Neural Architecture Search.
42. The Virtual-Augmented Reality Simulator: Evaluating OST-HMD AR calibration algorithms in VR.
43. Suspension-Based Locking Protocols for Parallel Real-Time Tasks.
44. Dynamic No-Fly Zone for Drones.
45. Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM Slots.
46. WDM-MDM Silicon-Based Optical Switching for Data Center Networks.
47. Routing in optical network-on-chip: minimizing contention with guaranteed thermal reliability.
48. HolyLight: A Nanophotonic Accelerator for Deep Learning in Data Centers.
49. Thermal Sensing Using Micro-ring Resonators in Optical Network-on-Chip.
50. Analyzing GEDF Scheduling for Parallel Real-Time Tasks with Arbitrary Deadlines.
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