48 results on '"Su, Xiaojing"'
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2. Automated Lithography Resolution Enhancement with Deep Learning Enabled Layout Modification during Physical Design Stage
3. Probability model of bridging defects for random logic via in 3nm double patterning technology at 0.33 NA
4. Performance analysis of a new two-stage tunable detector
5. Intelligent CFAR detector against interference of multiple targets
6. A novel contrast-aware SMO at 7nm technology node
7. Acceleration method for source mask optimization at 7nm technology node
8. Litho-aware redundant local-loop insertion framework with convolutional neural network
9. Source mask optimization based on design pattern library at 7nm technology node
10. Multi-level layout hotspot detection based on multi-classification with deep learning
11. Overlay mark sub structure design to improve the contrast
12. Analysis and mitigation of forbidden pitch effects for EUV lithography
13. Design rule optimization for via layers of multiple patterning solution at 7nm technology node
14. ETCH Model Based on Machine Learning
15. Systematic DTCO flow for yield improvement at 14/12nm technology node
16. Via optimization methodology for enhancing robustness of design at 14/12nm technology node
17. A fast DFM-driven standard cell qualification approach for critical layers of 14nm technology node
18. Design rule exploration for width sensitive zone for metal layers in advanced nodes
19. Sample patterns extraction from layout automatically based on hierarchical cluster algorithm for lithography process optimization
20. SRAF rule extraction and insertion based on inverse lithography technology
21. 2D SRAF rule extraction for fast application based on model-based results
22. Hybrid hotspot library building based on optical and geometry analysis at early stage for new node development
23. Drug-related webpages classification based on multi-modal local decision fusion
24. Aircraft target detection algorithm based on high resolution spaceborne SAR imagery
25. Enhancing manufacturability of standard cells by using DTCO methodology
26. New alignment mark design structures for higher diffraction order wafer quality enhancement
27. Hotspots fixing flow in NTD process by using DTCO methodology at 10nm metal 1 layer
28. Improving the topography performance of ion implantation resist
29. Design technology co-optimization for 14/10nm metal1 double patterning layer
30. A novel mask structure for measuring the defocus of scanner
31. Effective solution for the 14nm node multiple patterning lithography
32. Design technology co-optimization for N14 Metal1 layer
33. Probability model of bridging defects for random logic via in 3nm double patterning technology at 0.33 NA.
34. Thickness optimization for lithography process on silicon substrate
35. Focus shift impacted by mask 3D and comparison between Att. PSM and OMOG
36. A UKF algorithm with two arrays in bearings-only tracking
37. A novel contrast-aware SMO at 7nm technology node.
38. Acceleration method for source mask optimization at 7nm technology node.
39. Litho-aware redundant local-loop insertion framework with convolutional neural network.
40. Multi-level layout hotspot detection based on multi-classification with deep learning.
41. Source mask optimization based on design pattern library at 7nm technology node.
42. Design rule optimization for via layers of multiple patterning solution at 7nm technology node.
43. Analysis and mitigation of forbidden pitch effects for EUV lithography.
44. REVISIÓN DE LITERATURA SOBRE PRUEBAS DE DURABILIDAD DE RECUBRIMIENTOS SUPERHIDROFÓBICOS.
45. Table of contents.
46. Author index.
47. Proceedings.
48. Author index.
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