5 results on '"Nishii, Osamu"'
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2. Design and performance evaluation of an 8-processor 8,640 MIPS SoC with overhead reduction of interrupt handling in a multi-core system
3. An 8640 MIPS SoC with Independent Power-Off Control of 8 CPUs and 8 RAMs by An Automatic Parallelizing Compiler
4. SH-X3 xible SuperH multi-core for high-performance and low-power embedded systems
5. A 4320MIPS Four-Processor Core SMP/AMP with Individually Managed Clock Frequency for Low Power Consumption
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