44 results on '"Motoyoshi M"'
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2. Cu-Cu Direct Bonding Through Highly Oriented Cu Grains for 3D-LSI Applications
3. System Implementation of Synchronized SS-CDMA for QZSS Safely Confirmation System
4. Advanced Tape Expansion/Assembly Technology for FOWLP and Micro-LED Display
5. Reliability of 60-nm scale CAAC-IGZO FET
6. Demodulation characteristics of a 20GHz-band direct RF undersampling receiver
7. An image rejection type Ku-band direct RF undersampling CMOS receiver
8. Back-via 3D integration technologies by temporary bonding with thermoplastic adhesives and visible-laser debonding
9. A CMOS series/shunt switching type S/H IC for Ka-band direct RF under sampling receiver
10. Via-last/backside-via 3D integration using a visible-light laser debonding technique
11. Design of well-behaved low-loss millimetre-wave CMOS transmission lines
12. Process parameter calibration for millimeter-wave CMOS back-end device design with electromagnetic field analysis
13. On the length of THRU standard for TRL de-embedding on Si substrate above 110 GHz
14. 14.4mW 10Gbps CMOS limiting amplifier with local DC offset cancellers
15. On the choice of cascade de-embedding methods for on-wafer S-parameter measurement
16. 150GHz Divide-by-Three CMOS Frequency Divider with Power Line Injection
17. THz Matrix-Based Layered Wrapper Model of Common-Source MOSFET
18. Stacked SOI pixel detector using versatile fine pitch μ-bump technology
19. Design of Power-Efficient 130GHz Common-Source Amplifiers
20. A 120-GHz transmitter and receiver chipset with 9-Gbps data rate using 65-nm CMOS technology
21. High-speed estimation of MIMO system capacity using a hierarchical approach and preprocessing digital maps
22. A study for 0.18 /spl mu/m high-density MRAM
23. A 2.6-mW 106-GHz transmission-line-based voltage-controlled oscillator integrated in a 65-nm CMOS process.
24. A 120 GHz / 140 GHz dual-channel ASK receiver using standard 65 nm CMOS technology.
25. 116GHz CMOS injection locked oscillator with −99.3dBc/Hz at 1MHz offset phase noise.
26. D-band 3.6-dB-insertion-loss ASK modulator with 19.5-dB isolation in 65-nm CMOS technology.
27. 4.8GHz CMOS frequency multiplier with subharmonic pulse-injection locking.
28. In Situ Evaluation Method for On-Chip Inductors Using Oscillator Response.
29. 43μW 6GHz CMOS Divide-by-3 Frequency Divider Based on Three-Phase Harmonic Injection Locking.
30. High-Performance 1T1MTJ MRAM Technology with an Amorphous MTJ Material
31. Soft errors in SRAM devices induced by high energy neutrons, thermal neutrons and alpha particles.
32. Improvement of endurance to hot carrier degradation by hydrogen blocking P-SiO.
33. A novel 6T-SRAM cell technology designed with rectangular patterns scalable beyond 0.18 /spl mu/m generation and desirable for ultra high speed operation.
34. High-performance MRAM technology with an improved magnetic tunnel junction material
35. Ways of achieving high-performance MRAMs
36. Improvement of endurance to hot carrier degradation by hydrogen blocking P-SiO
37. A novel 6T-SRAM cell technology designed with rectangular patterns scalable beyond 0.18 μm generation and desirable for ultra high speed operation
38. Soft errors in SRAM devices induced by high energy neutrons, thermal neutrons and alpha particles
39. 76GHz CMOS Voltage-Controlled Oscillator with 7% Frequency Tuning Range.
40. Ways of achieving high-performance MRAMs.
41. A study for 0.18 μm high-density MRAM.
42. High-performance MRAM technology with an improved magnetic tunnel junction material.
43. A 5-/spl mu/m/sup 2/ full-CMOS cell for high-speed SRAMs utilizing a optical-proximity-effect correction (OPC) technology.
44. A framework for enterprise SLA in W-CDMA networks.
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