1. 16-bit three operand adder of CS3A and HC3A.
- Author
-
Sushmitha, Mallepally, Jamal, K., Kiran, Mannem, Manchalla, O. V. P. Kumar, and Pratyusha Chowdari, Ch.
- Subjects
MODULAR arithmetic ,ALGORITHMS - Abstract
The basic functionality unit that to executes modular arithmetic in different solving codes and uses a Pseudo-random bit generator (PRBG) algorithm. The Carry-save-adder (CS3A) is the most used a technique to execute the three-operand-adder. Whenever a high propagated delay O(n) occurs in the Ripple-carry stage of CS3A. In addition, Han-carlson adder is undergoing a parallel-prefix two-operand-adder. It can be used for three-operand-additions that reduce the criticalpath delay at the cost of an additional hardware. To implement the proposed architecture using Xilinx tool for a simulation and synthesis. The proposed adder post-synthesis results were observed 3.12, 5.31 and 9.28 times rapid than the CS3A for 32-bits, 64-bits, and 128-bits architectures, respectively. In addition, compared to CS3A, HC3A has a lower power consumption, a smaller delays and a less area. The lowest PDP and ADP in the proposed adder than in the current three-operand adder methods. [ABSTRACT FROM AUTHOR]
- Published
- 2023
- Full Text
- View/download PDF