10 results on '"Laurent Brunet"'
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2. Methodology for Active Junction Profile Extraction in thin film FD-SOI Enabling performance driver identification in 500°C devices for 3D sequential integration.
3. A review on opportunities brought by 3D-monolithic integration for CMOS device and digital circuit.
4. Precise EOT regrowth extraction enabling performance analysis of low temperature extension first devices.
5. Guidelines for intermediate back end of line (BEOL) for 3D sequential integration.
6. Transistor Temperature Deviation Analysis in Monolithic 3D Standard Cells.
7. Impact of intermediate BEOL technology on standard cell performances of 3D VLSI.
8. Opportunities brought by sequential 3D CoolCube™ integration.
9. Recent advances in 3D VLSI integration.
10. FDSOI bottom MOSFETs stability versus top transistor thermal budget featuring 3D monolithic integration.
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