76 results on '"Cheramy, S."'
Search Results
2. ExaNoDe: Combined Integration of Chiplets on Active Interposer with Bare Dice in a Multi-Chip-Module for Heterogeneous and Scalable High Performance Compute Nodes
3. Towards a Complete Direct Hybrid Bonding D2W Integration Flow: Known-Good-Dies and Die Planarization Modules Development
4. Active Interposer Technology for Chiplet-Based Advanced 3D System Architectures
5. Robustness and reliability achievements for direct hybrid bonding integration: a review
6. Die to wafer direct bonding: from fundamental mechanisms to optoelectronic and 3D applications
7. Hybrid bonding for 3D stacked image sensors: impact of pitch shrinkage on interconnect robustness
8. 3DVLSI, Technology and Application
9. A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches
10. 1μm Pitch direct hybrid bonding with <300nm wafer-to-wafer overlay accuracy
11. RF Characterization and Modeling of 10 µm Fine-Pitch Cu-Pillar on a High Density Silicon Interposer
12. Electrical Performance of High Density 10 µm Diameter 20 µm Pitch Cu-Pillar with Chip to Wafer Assembly
13. Hot spot aware microchannel cooling add-on for microelectronic chips in mobile devices
14. Towards high density 3D interconnections
15. ITAC: A complete 3D integration test platform
16. Heat spreading packaging solutions for hybrid bonded 3D-ICs
17. Thin micro-cold plate for hot-spot aware chip cooling
18. Development of fine pitch interconnections for 3D integrated circuits
19. Thermo-mechanical assessment of copper and graphite heat spreaders for compact packages
20. Reliable 300 mm Wafer Level Hybrid Bonding for 3D Stacked CMOS Image Sensors
21. New challenges and opportunities for 3D integrations
22. Silicon based dry-films evaluation for 2.5D and 3D Wafer-Level system integration improvement
23. Thermal measurements on flip-chipped system-on-chip packages with heat spreader integration
24. A comprehensive platform for thermal studies in TSV-based 3D integrated circuits
25. Assessment of a heat spreading solution for hot spots cooling in compact packages
26. Underfilling techniques comparison in 3D CtW stacking approach
27. Which interconnects for which 3D applications? Status and perspectives
28. Wafer level encapsulated materials evaluation for chip on wafer (CoW) approach in 2.5D Si interposer integration
29. Thermal correlation between measurements and FEM simulations in 3D ICs
30. RF characterization of substrate coupling between TSV and MOS transistors in 3D integrated circuits
31. Investigation of copper-tin transient liquid phase bonding reliability for 3D integration
32. Towards alternative technologies for fine pitch interconnects
33. Wafer level underfill entrapment in solder joint during thermocompression: Simulation and experimental validation
34. WSS and ZoneBOND temporary bonding techniques comparison for 80μm and 55μm functional interposer creation
35. Innovative wafer-level encapsulation & underfill material for silicon interposer application
36. Towards efficient and reliable 300mm 3D technology for wide I/O interconnects
37. Challenges and solutions for ultra-thin (50 μm) silicon using innovative ZoneBOND™ process
38. Characterization and modelling of Si-substrate noise induced by RF signal propagating in TSV of 3D-IC stack
39. 3D integration demonstration of a wireless product with design partitioning
40. TSV and Cu-Cu direct bonding: two key technologies for High Density 3D
41. Process and RF modelling of TSV last approach for 3D RF interposer
42. TSV as an alternative to wire bonding for a wireless industrial product: another step towards 3D integration
43. Development and characterisation of a 3D technology including TSV and Cu pillars for high frequency applications
44. Development and characterisation of high electrical performances TSV for 3D applications
45. 3D integration technology for set-top box application
46. New trends in wafer level packaging
47. Integration of a temporary carrier in a TSV process flow
48. Innovative wafer-level encapsulation & underfill material for silicon interposer application.
49. Ultra-fine pitch redistribution for 3D interposer.
50. 3D integration demonstration of a wireless product with design partitioning.
Catalog
Books, media, physical & digital resources
Discovery Service for Jio Institute Digital Library
For full access to our library's resources, please sign in.