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This paper describes the design of a novel Ku-band slotted waveguide antenna (SWA), taking into consideration the advantages and drawbacks of using a 3D direct metal laser sintering (DMLS) process. Indeed, the DMLS process makes it possible to produce a SWA with 64 radiating slots and its feeding network in a single and monolithic process. However, considering the lack of accuracy of the process, the whole design must be completely thought out and planned to avoid sensitive dimensions. Coupling irises inside such structures are elements of major sensitivity in this regard, so the radiating waveguides in the present work were designed to be TE20 ones, avoiding this kind of iris. Thus, a TE10 to TE20 converter was designed to be implemented in the overall power supply structure of an antenna array made up of four linear SWAs with 16 slots each. Both the elementary 16-slot SWA and the complete SWA with the feeding network were manufactured using DMLS. At a resonant frequency of 15 GHz, the measured realized gain is 22.26 dB with sidelobe levels below 10.1 dB. The measured reflection coefficient is lower than −12.6 dB at the center frequency. These measured performances confirm the proof of concept. [ABSTRACT FROM AUTHOR]

This article presents the implementation of the intrachip propagation channel in the case of a wireless interconnect network-on-chip used for parallel computing applications. These wireless interconnects still require precise propagation models to demonstrate that they can be considered as a realistic efficient alternative to the wired interconnects. First, we show the advantages of wireless solutions for broadcast applications. As this type of circuit will be realized using silicon as the main component, we present in the literature review the problems and constraints of integrated antennas and channels on silicon. Then, a deep electromagnetic study for the intrachip transmission is conducted, with measurements done using two manufactured prototypes of printed dipole antennas on silicon in the Ka-band (26–40 GHz) and in the $V$ -band (40–75 GHz) with different scenarios. The good agreement between simulations and measurements validates the problems encountered due to the silicon substrate and its environment. Finally, we propose perspective solutions in order to improve the intrachip transmission on integrated circuits and to prove the feasibility of the wireless network on chip using integrated antennas. [ABSTRACT FROM AUTHOR]

The recent developments in electronic cards such as the network equipment are characterized by the miniaturization of the board size and the increasing complexity of the layout. Because of these requirements, multi-layered printed circuit boards are commonly used and vias connecting signal lines on different layers, or integrated circuit devices to power and ground planes, are frequently used and often essential. However, a via is not an ideal transmission line. Besides, it creates discontinuities at high frequencies leading to high insertion loss degradation of signal which limits the performances of integrated circuit and systems. In this paper, the impacts of coupling between via and parallel-plates cavity on the response of microwave integrated devices are highlighted in the first part. Then, to describe the intrinsic interaction between the via transition and parallel-plate modes, the notion of parallel-plates matrix impedances is presented and new boundary conditions like open or plated through holes shielded boundaries of the cavities are introduced. Then, using this physics-based model, an intuitive equivalent circuit has been developed. Finally, the proposed approach and the equivalent circuits were validated by using comparisons with electromagnetic simulations and measurements in different scenarios. [ABSTRACT FROM AUTHOR]

This paper addresses the topic of high-speed interconnects in high density systems [systems on chip (SoCs), systems in package (SiPs), systems on package (SoPs), and multichip modules (MCMs)]. These microstrip or coplanar lines have, often, an underlayer of orthogonal metal grids liable to affect transmission characteristics. The characterization proposed in this paper relies on S-parameter measurements and electromagnetic simulations. The grids under study are of two kinds: grounded (CC) and floating (CO). In both cases, the signal is distorted in the time domain further to the occurrence of transmission zeroes whose position depend mainly on the grid length and, of course, on the grid charge, i.e., CC or CO. In order to easily estimate this position, we developed a simple equivalent circuit model and validated it by measurements and electromagnetic simulations. Then it was used to develop a set of expressions enabling one to analytically pinpoint the location of transmission zeroes in the frequency domain, while remaining valid for any underlayer of orthogonal metal lines or grids. [ABSTRACT FROM AUTHOR]