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Web applications can be constructed to assess the executive functions and literacy skills of preschool aged children using a variety of research protocols. This work describes such a web application and its research protocol with tasks that screen inhibition, auditory and visual working memory, letter sound connection, word identification, and cognitive flexibility. The application was tested on a group of 65 preschoolers with cognitive deficits whose parents were advised to allow their children to reattend kindergarten classes and a control group of 65 typically achieving peers of similar age and gender. The results revealed that children at the age of four and five years old with cognitive deficits presented lower scores of correct answers and larger latencies in all six tasks compared to children that participated in the control group. [ABSTRACT FROM AUTHOR]

Convolution Neural Networks (CNNs) are gaining ground in deep learning and Artificial Intelligence (AI) domains, and they can benefit from rapid prototyping in order to produce efficient and low-power hardware designs. The inference process of a Deep Neural Network (DNN) is considered a computationally intensive process that requires hardware accelerators to operate in real-world scenarios due to the low latency requirements of real-time applications. As a result, High-Level Synthesis (HLS) tools are gaining popularity since they provide attractive ways to reduce design time complexity directly in register transfer level (RTL). In this paper, we implement a MobileNetV2 model using a state-of-the-art HLS tool in order to conduct a design space exploration and to provide insights on complex hardware designs which are tailored for DNN inference. Our goal is to combine design methodologies with sparsification techniques to produce hardware accelerators that achieve comparable error metrics within the same order of magnitude with the corresponding state-of-the-art systems while also significantly reducing the inference latency and resource utilization. Toward this end, we apply sparse matrix techniques on a MobileNetV2 model for efficient data representation, and we evaluate our designs in two different weight pruning approaches. Experimental results are evaluated with respect to the CIFAR-10 data set using several different design methodologies in order to fully explore their effects on the performance of the model under examination. [ABSTRACT FROM AUTHOR]

Purpose: The purpose of the study was to develop and implement an institution-specific trigger tool based on the Institute for Healthcare Improvement medication module trigger tool (IHI MMTT) in order to detect and monitor ADEs. Methods: We performed an investigator-driven, single-center study using retrospective and prospective patient data to develop ("development phase") and implement ("implementation phase") an efficient, institution-specific trigger tool based on the IHI MMTT. Complete medical data from 1008 patients hospitalized in 2018 were used in the development phase. ADEs were identified by chart review. The performance of two versions of the tool was assessed by comparing their sensitivities and specificities. Tool A employed only digitally extracted triggers ("e-trigger-tool") while Tool B employed an additional manually extracted trigger. The superior tool – taking efficiency into account – was applied prospectively to 19– 22 randomly chosen charts per month for 26 months during the implementation phase. Results: In the development phase, 189 (19%) patients had ≥ 1 ADE (total 277 ADEs). The time needed to identify these ADEs was 15 minutes/chart. A total of 203 patients had ≥ 1 trigger (total 273 triggers – Tool B). The sensitivities and specificities of Tools A and B were 0.41 and 0.86, and 0.43 and 0.86, respectively. Tool A was more time-efficient than Tool B (4 vs 9 minutes/chart) and was therefore used in the implementation phase. During the 26-month implementation phase, 22 patients experienced trigger-identified ADEs and 529 did not. The median number of ADEs per 1000 patient days was 6 (range 0– 13). Patients with at least one ADE had a mean hospital stay of 22.3 ± 19.7 days, compared to 8.0 ± 7.6 days for those without an ADE (p = 2.7× 10− 14). Conclusion: We developed and implemented an e-trigger tool that was specific and moderately sensitive, gave consistent results and required minimal resources. [ABSTRACT FROM AUTHOR]

In this article we summarize suspected adverse events following immunization (AEFI) of pericarditis, myocarditis and perimyocarditis that were reported by our regional pharmacovigilance centre after COVID-19 mRNA-vaccination and discuss their association with these vaccines. Seventeen cases were reported between March and July 2021. Of these, nine had perimyocarditis, five myocarditis and three pericarditis. Twelve patients were male (71 %). The median age was 38 years (range 17 - 88). The most commonly observed presenting symptom was acute chest pain (65%). While 47% of the patients were previously healthy, 53% had at least one pre-existing comorbidity, with hypertension being the most prevalent (24%). The European Society of Cardiology diagnostic criteria for the reported AEFIs were fulfilled in twelve cases (71%). The AEFIs occurred after the first vaccine dose in six cases (35%), after the second vaccine dose in ten cases (59%) and after both doses in one case (6%). The median latency of all AEFIs taken together was 14 days (range 1 - 28) after the first vaccination and 3 days (range 1 - 17) after the second one. All patients except one were hospitalized (94%) with a median length of stay of 7.5 days (range 3 - 13). The majority of patients (n = 11, 65%) did not experience any complications, and 13 (77%) of the patients were recovered or recovering at the time of discharge. In 16 of the 17 cases (94%), the association between the AEFI and mRNA-vaccination was considered possible by the pharmacovigilance centre. [ABSTRACT FROM AUTHOR]

The increasing complexity of Application Specific Integrated Circuits (ASICs) and Systems-on-Chip (SoCs) that incorporate custom and standard embedded core IP blocks dictates the need for a new generation of automated and formal system EDA tools and methodologies. High-Level Synthesis (HLS) plays a critical role in the required Electronic System Level (ESL) methodologies. However, most of the available academic and commercial High-Level Synthesis (HLS) tools still do not play an established role in the system and hardware engineering teams. This is true for a number of practical reasons, analyzed and discussed in this work. The present article is a practical perspective of the required fully automated and formal tools, which are needed to constitute integral parts in Electronic Design Automation (EDA) flows. In addition, this article is a useful guide to the system engineer who wants to familiarize with HLS tools and to select the appropriate tool for the everyday engineering practice. The advanced HLS toolset that is analyzed in this paper is developed by the first author, its C-frontend by the second author, and they are both based on formal methods and fully automated techniques, thus they guarantee the correctness of the synthesized hardware implementations. This paper completes with a number of experiments that were executed using the author's methodology and they are used to evaluate the specific HLS tools. Consequently, a number of conclusions are drawn as well as suggestions for the future directions of HLS technology. In this way, what is practically needed by the hardware systems engineering community is outlined at the end of the paper. [ABSTRACT FROM AUTHOR]