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In state‐of‐the‐art organic transistors, the transit frequency fT is reported to be fT = 40 MHz for vertical organic transistors, where a voltage‐normalized fT corresponds to 0.36 MHz V−2. The reported highest fT for conventional organic transistors is fT = 160 MHz, where the voltage‐normalized fT is 0.1 MHz V−2. While the reported transit frequency fT of n‐MOSFETs for silicon technology when normalized by the applied biases exceeds 300 GHz V−2. The reported carrier mobility of organic semiconductors is over 100 cm2 V−1 s−1, which is almost an order of magnitude lower than that of silicon. However, the transit frequency fT of organic transistors lags far behind silicon technology by about six orders of magnitude at a comparable device length below 300 nm. In this work, a technology computer‐aided design (TCAD) simulator is adjusted to the experimental DC and AC characteristics of the 200 nm device length vertical organic permeable‐base transistors (OPBTs) based on C60 as semiconductor. The AC performance of the devices is investigated and quantitatively analyzed the influence and contribution of key design, structure and material parameters that determine fT and fmax. The feasible ways to enhance and optimize the highest achievable fT and fmax are identified to reach the GHz−range$\rm GHz-range$ and overcome the limitations to high‐frequency operation in organic transistors. [ABSTRACT FROM AUTHOR]

The development of organic thin-film transistors (TFTs) for high-frequency applications requires a detailed understanding of the intrinsic and extrinsic factors that influence their dynamic performance. This includes a wide range of properties, such as the device architecture, the contact resistance, parasitic capacitances, and intentional or unintentional asymmetries of the gate-to-contact overlaps. Here, we present a comprehensive analysis of the dynamic characteristics of the highest-performing flexible organic TFTs reported to date. For this purpose, we have developed the first compact model that provides a complete and accurate closed-form description of the frequency-dependent small-signal gain of organic field-effect transistors. The model properly accounts for all relevant secondary effects, such as the contact resistance, fringe capacitances, the subthreshold regime, charge traps, and non-quasistatic effects. We have analyzed the frequency behavior of low-voltage organic transistors fabricated in both coplanar and staggered device architectures on flexible plastic substrates. We show through S-parameter measurements that coplanar transistors yield more ideal small-signal characteristics with only a weak dependence on the overlap asymmetry. In contrast, the high-frequency behavior of staggered transistors suffers from a more pronounced dependence on the asymmetry. Using our advanced compact model, we elucidate the factors influencing the frequency-dependent small-signal gain and find that even though coplanar transistors have larger capacitances than staggered transistors, they benefit from substantially larger transconductances, which is the main reason for their superior dynamic performance. [ABSTRACT FROM AUTHOR]

We have developed models for three different short-channel effects [subthreshold-swing degradation, threshold-voltage roll-off, and drain-induced barrier lowering (DIBL)] in coplanar organic thin-film transistors (TFTs) and verified them against the measured current–voltage characteristics of TFTs having channel lengths as small as $0.5 \mu \text{m}$. To derive the models, the Schwarz–Christoffel transformation was applied to obtain a complex mapping function that links the coplanar device geometry to an equivalent geometry in a different coordinate system in order to solve Laplace’s equation of the 2-D potential problem. The solution to this potential problem serves as the basis for the definition of the short-channel models, which can be incorporated into any compact dc models for coplanar TFTs that use the TFTs’ threshold voltage and subthreshold swing as input parameters. To verify the model, the channel-length-dependent effects were extracted from technology computer-aided design (TCAD) simulations (transfer characteristics and surface-potential profile) and from measurements performed on organic p-channel TFTs fabricated using high-resolution stencil lithography. [ABSTRACT FROM AUTHOR]

We present analytical physics-based compact models for the Schottky barriers at the interfaces between the organic semiconductor and the source and drain contacts in organic thin-film transistors (TFTs) fabricated in the coplanar and the staggered device architecture, and we illustrate the effect of these Schottky barriers on the current–voltage characteristics of the TFTs. The model for the source barrier explicitly considers the field-dependent barrier lowering due to image charges. Potential solutions have been derived by applying the Schwarz–Christoffel transformation, leading to expressions for the electric field at the source barrier and for the contact resistance at the source contact. With regard to the drain barrier, a generic compact-modeling scheme based on the current–voltage characteristics of a barrier-less TFT is introduced that can be applied to any compact dc model. Finally, both models are incorporated into an existing charge-based compact dc model and verified against the results of measurements performed on coplanar and staggered organic TFTs with channel lengths ranging from 0.5 to $10.5~\mu \text{m}$. [ABSTRACT FROM AUTHOR]

In this work, short-channel effects (SCEs) in cylindrical gate-all-around (GAA) MOSFETs with intrinsic or lightly doped channels are analytically described by using the conformal mapping technique for 2-D double-gate (DG) FETs. An equivalent capacitor model leads to an equivalent channel length concept, which allows to correctly determine the SCEs relevant center and surface potentials (ΦC and ΦS) at the potential barrier. Furthermore, we make use of the rotational symmetry of GAA FETs and modify a compact drain current model of a DG device to use it for GAA transistors. Also, a mathematical correlation regarding quantum confinement for thin body transistors is derived, which shows that the mostly unwanted quantum effects occur in GAA structures already for thicker channels compared to DG transistors. Both transistor types experience a comparable influence with regard to quantization if the channel thickness of GAA FETs is 53% more than that of DG FETs. The dc behavior of our adapted model is verified with 3-D TCAD simulation data and applied to experimental data of ultrascaled silicon on insulator (SOI) omega-gate nanowire N-MOSFETs. [ABSTRACT FROM AUTHOR]

In this study, a consistent analytical charge-based model for the bias-dependent variability of the drain current of organic thin-film transistors is presented. The proposed model combines both charge-carrier-number-fluctuation effects and correlated-mobility-fluctuation effects to predict the drain-current variation and is verified using experimental data acquired from a statistical population of organic transistors with various channel dimensions, fabricated on flexible polymeric substrates in the coplanar or the staggered device architecture. [ABSTRACT FROM AUTHOR]

This article introduces analytical compact models of short-channel effects in staggered organic thin-film transistors (TFTs). The effects of subthreshold-swing degradation, threshold-voltage roll-off, and drain-induced barrier lowering (DIBL) on the static current-voltage characteristics of staggered TFTs are extracted from an analytical potential solution of the 2-D problem of the staggered geometry. This solution is derived by using the Schwarz–Christoffel transformation that leads to a complex mapping function linking the staggered geometry to an equivalent in another coordinate system for which an analytical potential solution exists. The technology CAD (TCAD) Software Sentaurus is used to verify the compact models. Finally, the closed-form and physics-based equations are incorporated into an existing compact current model and verified by measurements on staggered organic TFTs with channel lengths as small as 0.4 μm fabricated on flexible plastic substrates by stencil lithography. [ABSTRACT FROM AUTHOR]

A charge-based macromodel for small-signal ac and transient analyses of organic thin-film transistors (TFTs) is presented. Due to the comparatively small charge-carrier mobility in organic TFTs, the dynamic behavior of the gate-field-induced carrier channel is greatly affected by the frequency of the applied gate–source and drain–source voltages. The model presented here is, therefore, based on the transmission-line model and shown to reproduce the results of frequency-dependent admittance measurements and numerical simulations of the transient switching behavior of organic TFTs fabricated in the staggered architecture with good accuracy. The model has been implemented in the hardware description language Verilog-A. [ABSTRACT FROM AUTHOR]

Organic permeable base transistors (OPBTs) are of great interest for flexible electronic circuits, as they offer very large on‐current density and a record‐high transition frequency. They rely on a vertical device architecture with current transport through native pinholes in a central base electrode. This study investigates the impact of pinhole density and pinhole diameter on the DC device performance in OPBTs based on experimental data and TCAD simulation results. A pinhole density of NPin = 54 µm−2 and pinhole diameters around LPin = 15 nm are found in the devices. Simulations show that a variation of pinhole diameter and density around these numbers has only a minor impact on the DC device characteristics. A variation of the pinhole diameter and density by up to 100% lead to a deviation of less than 4% in threshold voltage, on/off current ratio, and sub‐threshold slope. Hence, the fabrication of OPBTs with reliable device characteristics is possible regardless of statistical deviations in thin film formation. [ABSTRACT FROM AUTHOR]

Reconfigurable field-effect transistors (RFETs) are of interest as devices for dynamically switching between n- and p-type polarity which enables different logic computations using the same hardware. So far, RFETs have been realized with one or even two additional program gates for accomplishing reconfigurability. This paper presents an RFET design with just one single-gate on a silicon nanowire channel. Based on measured and device simulation data of a double-gate (DG) RFET, it is shown that the proposed simplified single-gate (SG) RFET achieves the same functionality and dc characteristics as the more complex DG-RFET. Besides reducing the wiring for the program gate(s), the SG-RFET has the additional advantage of being scalable to smaller channel length and thus achieving higher operating speed. [ABSTRACT FROM PUBLISHER]

In this paper, automatic parameter extraction techniques of Agilent's IC-CAP modeling package are presented to extract our explicit compact model parameters. This model is developed based on a surface potential model and coded in Verilog-A. The model has been adapted to Trigate MOSFETs, includes short channel effects (SCEs) and allows accurate simulations of the device characteristics. The parameter extraction routines provide an effective way to extract the model parameters. The techniques minimize the discrepancy and error between the simulation results and the available experimental data for more accurate parameter values and reliable circuit simulation. Behavior of the second derivative of the drain current is also verified and proves to be accurate and continuous through the different operating regimes. The results show good agreement with measured transistor characteristics under different conditions and through all operating regimes [ABSTRACT FROM AUTHOR]