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This paper presents a fault-tolerance technique for H.264's Context-Adaptive Variable Length Coding (CAVLC) on unreliable computing hardware. The application-specific knowledge is leveraged at both algorithm and architecture levels to protect the CAVLC process (especially context adaptation and coding tables) in a reliable yet power-efficient manner. Specifically, the statistical analysis of coding syntax and video content properties are exploited for: (1) selective redundancy of coefficient/header data of video bitstreams; (2) partitioning the coding tables into various sub-tables to reduce the power overhead of fault tolerance; and (3) run-time power management of memory parts storing the sub-tables and their parity computations. Experimental results demonstrate that leveraging application-specific knowledge reduces area and performance overhead by 2x compared to a double-parity table protection technique. For functional verification and area comparison, the complete H.264 CAVLC architecture is prototyped on a Xilinx Virtex-5 FPGA (though not limited to it). [ABSTRACT FROM PUBLISHER]

High workload and throughput requirements of image and video processing applications can be sustained on a many-core system. However, inefficient parallelization and processing assignments to the cores result in reduced system efficiency. Eliminating them necessitates a power-efficient and balanced workload distribution among the cores. This paper addresses these challenges by introducing a novel workload-balancing and adaptation scheme. Our scheme accounts for the application characteristics and the underlying hardware, and the variation of load. Automatic selection of the number of cores and distribution of workload to each core depends on the throughput requirements, available number of cores, allowable voltage–frequency settings, and data content. Moreover, runtime derivation and fine-tuning of the workload-dependent frequency estimation models of each core are achieved using a closed-loop feedback mechanism. Furthermore, we propose an optional feedback control-based workload-tuning scheme that can further reduce the total power consumption. A case study of an advanced multithreaded video application demonstrates up to $\sim 42$ % power savings (average $\sim 39$ %) with negligible video quality degradation, using our proposed power-efficient workload-balancing and tuning. [ABSTRACT FROM AUTHOR]

High throughput demands have resulted in enormous increase in complexity of multicast video applications, which require multiple video encoders to simultaneously compress individual views. In this paper, we present an approach to encode independent videos using H.264 intra encoder on a single hardware platform, where the hardware resources are shared by independent encoders in a time-multiplexed manner. In addition to lowering the latency introduced by multicasting, we address the strong sequential data dependencies within the encoder. At 25 frames/s, 150 MHz prototype of the proposed encoder and multiple video capture/display on a mid-range field programmable gate array is also presented. [ABSTRACT FROM PUBLISHER]