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Process capability indices are widely used to check quality standards both at the production level and for business activity. They consider the location and the deviation from specification limits and targets. The literature contains many contributions on this topic both in the univariate and the multivariate context. Motivated by a real semiconductor case study, we discuss the role of rational subgroups and the challenge they present in the computation of capability indices, especially when data refer to lots of products. In addition, our context involves a mix of problems: unilateral specification limit, nonsymmetric distribution of the data, evidence of data from a mixture of distributions, and the need to filter one component of the mixture. After solving the previous issues and because of the peculiar characteristics of semiconductor processes based on the so called “wafers,” we contribute to the literature a proposal on how to compute capability indices in the case of heteroscedastic spatial processes. With a generalized additive model, we show that it is possible to estimate a capability surface that allows the identification of regions expected to not be fully compliant with the desired quality standards. more...

This paper introduces a special issue entirely devoted to the topic 'Statistics for Microelectronics'. The relevance of the theme for this journal is due to both the primary role that microelectronics has in many business activities of the modern society and to the complexity of the production process of integrated circuits that are obtained by several different steps performed on a wafer (i.e., a thin silicon slice of a few inches of diameter). Advanced statistical methods are necessary to monitor and improve this process because the yield of this industrial manufacturing is typically tiny and requires a very high precision. After a brief review of the semiconductor manufacturing process, we point out how statistical methodologies can contribute to this. Finally, we introduce the papers that discuss some key aspects of this subject. Copyright (c) 2013 John Wiley & Sons, Ltd. more...

Deposition of silicon dioxide (SiO2) is a critical step of integrated circuit manufacturing; hence it is monitored during the manufacturing process at a grid of points defined on the wafer area. Since collecting thickness measurements is expensive, it is a compelling issue to investigate how a sub grid can be identified. A strategy based on spatial prediction and simulating annealing is proposed to tackle the problem which proved to be effective when applied to a real process. A diagnostic device for monitoring the deposition process is also discussed which can be usefully adopted in the day-to-day activity by practitioners acting in process control of a microelectronics fab. © 2012 Elsevier B.V. All rights reserved. more...